Commit Graph

66 Commits

Author SHA1 Message Date
bellard
ce5232c5c2 moved halted field to CPU_COMMON
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 17:14:10 +00:00
aurel32
ea2b542a4c SH4 MMU improvements
(Shin-ichiro KAWASAKI)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4396 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 18:45:55 +00:00
ths
e96e2044a1 SH4: system emulator interrupt update, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3762 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02 06:18:24 +00:00
ths
823029f909 SH4 delay slot code update, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3761 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02 06:10:04 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ths
e04ea3dc1a Handle endianness of double floats, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3020 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-25 13:53:11 +00:00
ths
ea6cf6be8e Emulate more fpu opcodes, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3002 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-22 11:12:01 +00:00
ths
d10927f86b Add missing cpu_halted function, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2998 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-22 10:11:48 +00:00
ths
9467d44c4d Move target-specific defines to the target directories.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 21:02:38 +00:00
ths
5a7b542bbd siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2369 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-31 12:16:51 +00:00
ths
9042c0e20d Check ELF binaries for machine type and endianness.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-23 14:18:40 +00:00
pbrook
9c2a9ea1b1 SH bugfixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1991 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-18 19:12:54 +00:00
bellard
eda9b09b1d sh4 fmov et al instructions (amatus)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1971 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 15:02:05 +00:00
bellard
fdf9b3e831 sh4 target (Samuel Tardieu)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1861 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-27 21:07:38 +00:00