Commit Graph

96393 Commits

Author SHA1 Message Date
Paolo Bonzini
5adb43be79 configure: introduce --cross-prefix-*=
Also in preparation for handling more binaries from the cross binutils,
support an option --cross-prefix-ARCH.  All cross_cc_* defaults are
replaced with cross_prefix_*; the cross_cc_* fallbacks are extended
to the cross-compilation prefix, but the compiler fallbacks remain
as well.  This way, for example, --cross-cc-arm=arm-linux-gnueabihf-clang
also applies to armeb binaries.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220517092616.1272238-11-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-22-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
2ad60f6f8c configure: handle host compiler in probe_target_compiler
In preparation for handling more binaries than just cc, handle
the case of "probe_target_compiler $cpu" directly in the function,
setting the target_* variables based on the ones that are used to
build QEMU.  The clang check also needs to be moved after this
fallback.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220517092616.1272238-10-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-21-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
46af66edcb configure: add missing cross compiler fallbacks
The arm compiler can be used for armeb, and the sparc64 compiler
can be used for sparc.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220517092616.1272238-9-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-20-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
cd362defbb tests/tcg: merge configure.sh back into main configure script
tests/tcg/configure.sh has a complicated story.

In the beginning its code ran as part of the creation of config-target.mak
files, and that is where it placed the information on the target compiler.
However, probing for the buildability of TCG tests required multiple
inclusions of config-target.mak in the _main_ Makefile (not in
Makefile.target, which took care of building the QEMU executables in
the pre-Meson era), which polluted the namespace.

Thus, it was moved to a separate directory.  It created small config-*.mak
files in $(BUILD_DIR)/tests/tcg.  Those were also included multiple
times, but at least they were small and manageable; this was also an
important step in disentangling the TCG tests from Makefile.target.

Since then, Meson has allowed the configure script to go on a diet.
A few compilation tests survive (mostly for sanitizers) but these days
it mostly takes care of command line parsing, looking for tools, and
setting up the environment for Meson to do its stuff.

It's time to extend configure with the capability to build for more
than just one target: not just tests, but also firmware.  As a first
step, integrate all the logic to find cross compilers in the configure
script, and move tests/tcg/configure.sh back there (though as a
separate loop, not integrated in the one that generates target
configurations for Meson).

tests/tcg is actually very close to being buildable as a standalone
project, so I actually expect the compiler tests to move back to
tests/tcg, as a "configure" script of sorts which would run at Make
time after the docker images are built.  The GCC tree has a similar idea
of doing only bare-bones tree-wide configuration and leaving the rest
for Make time.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220517092616.1272238-8-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-19-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
867998cf56 tests/tcg: correct target CPU for sparc32
We do not want v8plus for pure sparc32, as the difference with the V8 ABI
are only meaningful on 64-bit CPUs suh as ultrasparc; supersparc is the
best CPU to use for 32-bit.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220517092616.1272238-7-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-18-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
45f1eecdd6 configure, meson: move symlinking of ROMs to meson
This is useful because pc-bios/meson.build already has a list of all ROM
files, and thus does not need to use wildcards.  The problems with
wildcards are mentioned above the definition of the LINKS variable,
but then the recommendation is disattended.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220517092616.1272238-6-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-17-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
95808875be build: do a full build before running TCG tests
TCG tests need both QEMU and firmware to be built, so do "ninja all" before
trying to run them.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220517092616.1272238-5-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-16-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
9b32ba53f3 build: add a more generic way to specify make->ninja dependencies
Let any make target specify ninja goals that needs to be built for it
(though selecting the goals is _not_ recursive on depending targets)
instead of having a custom mechanism only for "make check" and "make
bench".

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220517092616.1272238-4-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-15-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
231ca96316 build: clean up ninja invocation
Fix an incorrect "@@:" and move "-d keepdepfile" to the NINJAFLAGS variable.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220517092616.1272238-3-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-14-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Paolo Bonzini
ea857a3b79 configure: do not define or use the CPP variable
Just hardcode $(CC) -E, it should be enough.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220517092616.1272238-2-pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-13-alex.bennee@linaro.org>
2022-06-01 15:47:43 +01:00
Alex Bennée
9e19fd7d4a tests/docker: update debian-amd64 with lcitool
The one minor wrinkle we need to account for is the netmap support
still requires building from source. We also include cscope and GNU
global as they are used in one of the builds.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Luigi Rizzo <rizzo@iet.unipi.it>
Cc: Giuseppe Lettieri <g.lettieri@iet.unipi.it>
Cc: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-12-alex.bennee@linaro.org>
2022-06-01 15:47:23 +01:00
Alex Bennée
4ec740e12d tests/docker: update debian-ppc64el-cross with lcitool
Use lcitool to update debian-ppc64el-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-11-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Alex Bennée
1e834d1714 tests/docker: update debian-mips64el-cross with lcitool
Use lcitool to update debian-mips64el-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-10-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Alex Bennée
432ae739c6 tests/docker: update debian-mipsel-cross with lcitool
Use lcitool to update debian-mipsel-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-9-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Alex Bennée
9480624187 tests/docker: update debian-armel-cross with lcitool
Use lcitool to update debian-armel-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-8-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Alex Bennée
18ad049d90 tests/docker: update debian-armhf-cross with lcitool
Use lcitool to update debian-armhf-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-7-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Alex Bennée
06885cf935 tests/lcitool: fix up indentation to correct style
3 space indentation snuck into the initial commit. Clean it up before
we let it get established. I've also:

  - removed unused os import
  - added double lines between functions
  - added some comments and grouped and sorted the generation stanzas

My lint tool is also recommending using f-strings but that requires
python 3.6.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-6-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Alex Bennée
85b141ea6a meson.build: fix summary display of test compilers
The recent refactoring of configure.sh dropped a number of variables
we relied on for printing out information. Make it simpler.

Fixes: eebf199c09 (tests/tcg: invoke Makefile.target directly from QEMU's makefile)
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220527153603.887929-5-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Marc-André Lureau
861dca3707 gitlab-ci: add meson JUnit test result into report
This allows the gitlab UI to show the test results in different ways,
see doc:

  https://docs.gitlab.com/ee/ci/unit_test_reports.html#how-it-works

Previous we only reports avocado test results (.avocado_test_job_template),
with this change, the qemu/meson tests are also covered.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220525173411.612224-1-marcandre.lureau@redhat.com>
[AJB: expand the commit description]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220527153603.887929-4-alex.bennee@linaro.org>
2022-06-01 13:06:32 +01:00
Thomas Huth
6fd4e75610 .gitlab-ci.d/crossbuilds: Fix the dependency of the cross-i386-tci job
The cross-i386-tci job uses the fedora-i386-cross image, so we should make sure
that the corresponding job that builds it (the i386-fedora-cross-container job)
has finished before we start the TCI job.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220524092600.89997-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-3-alex.bennee@linaro.org>
2022-06-01 10:21:49 +01:00
Thomas Huth
658f2da1f3 .gitlab-ci.d/container-cross: Fix RISC-V container dependencies / stages
The "riscv64-debian-cross-container" job does not depend on any other
container job from the first stage, so we can move it to the first
stage, too.

The "riscv64-debian-test-cross-container" job needs the debian11
container, so we should add a proper "needs:" statement here.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220524093141.91012-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220527153603.887929-2-alex.bennee@linaro.org>
2022-06-01 10:21:49 +01:00
Richard Henderson
7077fcb9b6 Pull request
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Merge tag 'vmbus-maint-20220530' of https://github.com/maciejsszmigiero/qemu into staging

Pull request

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* tag 'vmbus-maint-20220530' of https://github.com/maciejsszmigiero/qemu:
  hw/hyperv/vmbus: Remove unused vmbus_load/save_req()
  MAINTAINERS: Add myself as the maintainer for Hyper-V VMBus

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-30 12:40:36 -07:00
Philippe Mathieu-Daudé
6ede46b910 hw/hyperv/vmbus: Remove unused vmbus_load/save_req()
vmbus_save_req() and vmbus_load_req() are not used.
Remove them to avoid maintaining dead code.

This essentially reverts commit 4dd8a7064b
("vmbus: add infrastructure to save/load vmbus requests").

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20211106134155.582312-2-philmd@redhat.com>
[MSS: Remove also corresponding variables, which are now unused]
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
2022-05-30 19:49:42 +02:00
Maciej S. Szmigiero
ee344768c1 MAINTAINERS: Add myself as the maintainer for Hyper-V VMBus
This way there is some contact point for incoming patches,
and somebody to review and pick up them.

Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
2022-05-30 19:12:38 +02:00
Richard Henderson
ed72f34421 target-arm queue:
* docs/system/arm: Add FEAT_HCX to list of emulated features
  * target/arm/hvf: Include missing "cpregs.h"
  * hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready
  * SVE: refactor to use TRANS/TRANS_FEAT macros and push
    SVE feature check down to individual insn level
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Merge tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * docs/system/arm: Add FEAT_HCX to list of emulated features
 * target/arm/hvf: Include missing "cpregs.h"
 * hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready
 * SVE: refactor to use TRANS/TRANS_FEAT macros and push
   SVE feature check down to individual insn level

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# gpg: Signature made Mon 30 May 2022 09:06:05 AM PDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]

* tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu-arm: (117 commits)
  target/arm: Remove aa64_sve check from before disas_sve
  target/arm: Add sve feature check for remaining trans_* functions
  target/arm: Use TRANS_FEAT for do_FMLAL_zzxw
  target/arm: Use TRANS_FEAT for do_FMLAL_zzzw
  target/arm: Use TRANS_FEAT for do_shr_narrow
  target/arm: Use TRANS_FEAT for do_shll_tb
  target/arm: Use TRANS_FEAT for do_narrow_extract
  target/arm: Use TRANS_FEAT for FCMLA_zzxz
  target/arm: Remove assert in trans_FCMLA_zzxz
  target/arm: Use TRANS_FEAT for DO_FPCMP
  target/arm: Use TRANS_FEAT for DO_FP_IMM
  target/arm: Move null function and sve check into do_fp_imm
  target/arm: Use TRANS_FEAT for gen_gvec_fpst_zzzzp
  target/arm: Introduce gen_gvec_fpst_zzzzp
  target/arm: Use TRANS_FEAT for FCADD
  target/arm: Use TRANS_FEAT for gen_gvec_fpst_arg_zpzz
  target/arm: Rename do_zpzz_ptr to gen_gvec_fpst_arg_zpzz
  target/arm: Use TRANS_FEAT for do_ppz_fp
  target/arm: Use TRANS_FEAT for FLOGB
  target/arm: Use TRANS_FEAT for do_frint_mode
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-30 09:22:24 -07:00
Richard Henderson
b1071174d2 target/arm: Remove aa64_sve check from before disas_sve
We now have individual checks on all insns within disas_sve.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-115-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:12 +01:00
Richard Henderson
1402a6b88f target/arm: Add sve feature check for remaining trans_* functions
For all remaining trans_* functions that do not already
have a check, add one now.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-114-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
fc7c882944 target/arm: Use TRANS_FEAT for do_FMLAL_zzxw
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-113-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
72c7f90621 target/arm: Use TRANS_FEAT for do_FMLAL_zzzw
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-112-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
f7f2f0faa2 target/arm: Use TRANS_FEAT for do_shr_narrow
Rename from do_sve2_shr_narrow and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-111-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
5a528bb5d8 target/arm: Use TRANS_FEAT for do_shll_tb
Rename from do_sve2_shll_tb and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-110-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
6100d08493 target/arm: Use TRANS_FEAT for do_narrow_extract
Rename from do_sve2_narrow_extract and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-109-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
e600d64980 target/arm: Use TRANS_FEAT for FCMLA_zzxz
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-108-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
df9024760e target/arm: Remove assert in trans_FCMLA_zzxz
Since 636ddeb15c, we do not require rd == ra.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-107-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
d961b3e40b target/arm: Use TRANS_FEAT for DO_FPCMP
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-106-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
98c37459c3 target/arm: Use TRANS_FEAT for DO_FP_IMM
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-105-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
413ee8e41a target/arm: Move null function and sve check into do_fp_imm
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-104-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
498be5b87d target/arm: Use TRANS_FEAT for gen_gvec_fpst_zzzzp
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-103-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
e14da11035 target/arm: Introduce gen_gvec_fpst_zzzzp
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-102-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
6f5cd67008 target/arm: Use TRANS_FEAT for FCADD
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-101-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
7de2617b7a target/arm: Use TRANS_FEAT for gen_gvec_fpst_arg_zpzz
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-100-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
7e2d07ff87 target/arm: Rename do_zpzz_ptr to gen_gvec_fpst_arg_zpzz
Rename the function to match other expansion functions and
move to be adjacent.  Split out gen_gvec_fpst_zzzp as a
helper while we're at it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-99-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
63d6aef86c target/arm: Use TRANS_FEAT for do_ppz_fp
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-98-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
7b9dfcfec8 target/arm: Use TRANS_FEAT for FLOGB
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-97-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
2764583695 target/arm: Use TRANS_FEAT for do_frint_mode
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-96-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
13c0dd1739 target/arm: Move null function and sve check into do_frint_mode
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-95-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
0360730c46 target/arm: Rename do_zpz_ptr to gen_gvec_ool_fpst_arg_zpz
Rename the function to match other expansion function and
move to be adjacent.  Split out gen_gvec_fpst_zzp as a
helper while we're at it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-94-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
ed6bb6b4d2 target/arm: Expand frint_fns for MO_8
Simplify indexing of this array.  This will allow folding
of the illegal esz == 0 into the normal fn == NULL check.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-93-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
de58c6b09f target/arm: Use TRANS_FEAT for FRECPE, FRSQRTE
Rename do_zz_fp to gen_gvec_fpst_arg_zz, and move up.
Split out gen_gvec_fpst_zz as a helper while we're at it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-92-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
8003e7cf15 target/arm: Use TRANS_FEAT for do_reduce
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-91-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00