Commit Graph

13514 Commits

Author SHA1 Message Date
Michael Walle
b6c9c9401c ossaudio: add endianness support for VoiceIn
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: malc <av1474@comtv.ru>
2011-01-09 03:05:24 +03:00
Aurelien Jarno
d43ffce140 tcg/mips: fix branch target change during code retranslation
TCG on MIPS was trying to avoid changing the branch offset, but didn't
due to a stupid typo. Fix it.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-08 16:41:43 +01:00
Aurelien Jarno
9a3abc21a6 tcg/arm: fix qemu_st64 for big endian targets
Due to a typo, qemu_st64 doesn't properly byteswap the 32-bit low word of
a 64 bit word before saving it. This patch fixes that.

Acked-by: Andrzej Zaborowski <balrogg@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-08 16:41:33 +01:00
Aurelien Jarno
c69806ab82 tcg/arm: fix branch target change during code retranslation
QEMU uses code retranslation to restore the CPU state when an exception
happens. For it to work the retranslation must not modify the generated
code. This is what is currently implemented in ARM TCG.

However on CPU that don't have icache/dcache/memory synchronised like
ARM, this requirement is stronger and code retranslation must not modify
the generated code "atomically", as the cache line might be flushed
at any moment (interrupt, exception, task switching), even if not
triggered by QEMU. The probability for this to happen is very low, and
depends on cache size and associativiy, machine load, interrupts, so the
symptoms are might happen randomly.

This requirement is currently not followed in tcg/arm, for the
load/store code, which basically has the following structure:
  1) tlb access code is written
  2) conditional fast path code is written
  3) branch is written with a temporary target
  4) slow path code is written
  5) branch target is updated
The cache lines corresponding to the retranslated code is not flushed
after code retranslation as the generated code is supposed to be the
same. However if the cache line corresponding to the branch instruction
is flushed between step 3 and 5, and is not flushed again before the
code is executed again, the branch target is wrong. In the guest, the
symptoms are MMU page fault at a random addresses, which leads to
kernel page fault or segmentation faults.

The patch fixes this issue by avoiding writing the branch target until
it is known, that is by writing only the branch instruction first, and
later only the offset.

This fixes booting linux guests on ARM hosts (tested: arm, i386, mips,
mipsel, sh4, sparc).

Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-08 16:39:47 +01:00
Aurelien Jarno
497aebb99e Merge branch 'linux-user-for-upstream' of git://gitorious.org/qemu-maemo/qemu
* 'linux-user-for-upstream' of git://gitorious.org/qemu-maemo/qemu:
  Remove dead code for ARM semihosting commandline handling
  Fix commandline handling for ARM semihosted executables
  linux-user: Fix incorrect NaN detection in ARM nwfpe emulation
  softfloat: Implement floatx80_is_any_nan() and float128_is_any_nan()
  linux-user: Implement FS_IOC_FIEMAP ioctl
  linux-user: Support ioctls whose parameter size is not constant
  linux-user: Implement sync_file_range{,2} syscalls
2011-01-08 16:25:48 +01:00
Wolfgang Schildbach
67af42ac5a Remove dead code for ARM semihosting commandline handling
There are some bits in the code which were used to store the commandline for
the semihosting call. These bits are now write-only and can be removed.

Signed-off-by: Wolfgang Schildbach <wschi@dolby.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
2011-01-07 18:20:57 +02:00
Wolfgang Schildbach
2e8785acc6 Fix commandline handling for ARM semihosted executables
Use the copy of the command line that loader_build_argptr() sets up in guest
memory as the command line to return from the ARM SYS_GET_CMDLINE semihosting
call. Previously we were using a pointer to memory which had already been
freed before the guest program started.

This fixes https://bugs.launchpad.net/qemu/+bug/673613 .

Signed-off-by: Wolfgang Schildbach <wschi@dolby.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
2011-01-07 18:20:48 +02:00
Peter Maydell
3ebe80c299 linux-user: Fix incorrect NaN detection in ARM nwfpe emulation
The code in the linux-user ARM nwfpe emulation was incorrectly
checking only for quiet NaNs when it should have been checking
for any kind of NaN. This is probably because the code in
question was taken from the Linux kernel, whose copy of the
softfloat library had been modified so that float*_is_nan()
returned true for all NaNs, not just quiet ones. The qemu
equivalent function is float*_is_any_nan(), so use that.
NB that this code is really obsolete since nobody uses FPE
for actual arithmetic now; this is just cleanup following
the recent renaming of the NaN related functions.

Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
2011-01-07 17:38:48 +02:00
Peter Maydell
2bed652fc5 softfloat: Implement floatx80_is_any_nan() and float128_is_any_nan()
Implement versions of float*_is_any_nan() for the floatx80 and
float128 types.

Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
2011-01-07 17:35:48 +02:00
Peter Maydell
285da2b9a8 linux-user: Implement FS_IOC_FIEMAP ioctl
Implement the FS_IOC_FIEMAP ioctl using the new support for
custom handling of ioctls; this is needed because the struct
that is passed includes a variable-length array.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
2011-01-07 17:20:58 +02:00
Peter Maydell
d2ef05bb44 linux-user: Support ioctls whose parameter size is not constant
Some ioctls (for example FS_IOC_FIEMAP) use structures whose size is
not constant. The generic argument conversion code in do_ioctl()
cannot handle this, so add support for implementing a special-case
handler for a particular ioctl which does the conversion itself.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
2011-01-07 17:20:37 +02:00
Edgar E. Iglesias
cb752a608c cris: Allow more TB chaning
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2011-01-07 16:18:13 +01:00
Peter Maydell
c727f47d59 linux-user: Implement sync_file_range{,2} syscalls
Implement the missing syscalls sync_file_range and sync_file_range2.
The latter in particular is used by newer versions of apt on Ubuntu
for ARM.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
2011-01-07 17:13:22 +02:00
Edgar E. Iglesias
2a704b137f cris: Avoid useless tmp in t_gen_cc_jmp()
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2011-01-07 12:50:38 +01:00
Aurelien Jarno
78935c4a4b cirrus: delete GCC 4.6 warnings
Commit 92d675d1c1 triggered uninitialized
variables warning with GCC 4.6. Fix them by adding zero initializers.

Acked-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:29:04 +01:00
Peter Maydell
cecd8504b8 target-arm: wire up the softfloat flush_input_to_zero flag
Wire up the new softfloat support for flushing input denormals
to zero on ARM. The FPSCR FZ bit enables flush-to-zero for
both inputs and outputs, but the reporting of when inputs are
flushed to zero is via a separate IDC bit rather than the UFC
(underflow) bit used when output denormals are flushed to zero.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:59 +01:00
Peter Maydell
b12c390b91 target-arm: Set softfloat cumulative exc flags from correct FPSCR bits
When handling a write to the ARM FPSCR, set the softfloat cumulative
exception flags from the cumulative flags in the FPSCR, not the
exception-enable bits. Also don't apply a mask: vfp_exceptbits_to_host
will only look at the correct bits anyway.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:59 +01:00
Peter Maydell
37d18660bb softfloat: Implement flushing input denormals to zero
Add support to softfloat for flushing input denormal float32 and float64
to zero. softfloat's existing 'flush_to_zero' flag only flushes denormals
to zero on output. Some CPUs need input denormals to be flushed before
processing as well. Implement this, using a new status flag to enable it
and a new exception status bit to indicate when it has happened. Existing
CPUs should be unaffected as there is no behaviour change unless the
mode is enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:59 +01:00
Aurelien Jarno
838fa72d0b target-arm: fix SMMLA/SMMLS instructions
SMMLA and SMMLS are broken on both in normal and thumb mode, that is
both (different) implementations are wrong. They try to avoid a 64-bit
add for the rounding, which is not trivial if you want to support both
SMMLA and SMMLS with the same code.

The code below uses the same implementation for both modes, using the
code from the ARM manual. It also fixes the thumb decoding that was a
mix between normal and thumb mode.

This fixes the issues reported in
https://bugs.launchpad.net/qemu/+bug/629298

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:46 +01:00
Blue Swirl
71df0eeb98 block: delete a write-only variable
Avoid a warning with GCC 4.6.0:
/src/qemu/block.c: In function 'bdrv_img_create':
/src/qemu/block.c:2862:25: error: variable 'fmt' set but not used [-Werror=unused-but-set-variable]

CC: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-06 18:25:37 +00:00
Blue Swirl
3fbb33d08d cirrus_vga: Declare as little endian
This patch replaces explicit bswaps with endianness hints to the
mmio layer.

CC: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-06 18:25:26 +00:00
Blue Swirl
4b78a802ff pc: move port 92 stuff back to pc.c from pckbd.c
956a3e6bb7 introduced a bug concerning
reset bit for port 92.

Since the keyboard output port and port 92 are not compatible anyway,
let's separate them.

Reported-by: Peter Lieven <pl@dlh.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
--
v2: added reset handler and VMState
2011-01-06 18:24:35 +00:00
Aurelien Jarno
e024e881bb target-ppc: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for PowerPC targets by
providing an appropriate pickNaN function.

Also fix the #ifdef tests for default NaN definition, the correct name
is TARGET_PPC instead of TARGET_POWERPC.

Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:42 +01:00
Aurelien Jarno
084d19ba71 target-mips: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for MIPS targets by
providing an appropriate pickNaN function.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:35 +01:00
Aurelien Jarno
1f398e0825 softfloat: use float{32,64,x80,128}_maybe_silence_nan()
Use float{32,64,x80,128}_maybe_silence_nan() instead of toggling the
sNaN bit manually. This allow per target implementation of sNaN to qNaN
conversion.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2011-01-06 16:29:29 +01:00
Aurelien Jarno
f6a7d92aed softfloat: add float{x80,128}_maybe_silence_nan()
Add float{x80,128}_maybe_silence_nan() functions, they will be need by
propagateFloat{x80,128}NaN().

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:23 +01:00
Aurelien Jarno
93ae1c6fea softfloat: fix float{32,64}_maybe_silence_nan() for MIPS
On targets that define sNaN with the sNaN bit as one, simply clearing
this bit may correspond to an infinite value.

Convert it to a default NaN if SNAN_BIT_IS_ONE, as it corresponds to
the MIPS implementation, the only emulated CPU with SNAN_BIT_IS_ONE.
When other CPU of this type are added, this might be updated to include
more cases.

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:17 +01:00
Aurelien Jarno
d735d695e7 softfloat: rename *IsNaN variables to *IsQuietNaN
Similarly to what has been done in commit
185698715d rename the misnamed *IsNaN
variables into *IsQuietNaN.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:11 +01:00
Aurelien Jarno
34d2386198 softfloat: remove HPPA specific code
We don't have any HPPA target, so let's remove HPPA specific code. It
can be re-added when someone adds an HPPA target.

This has been blessed by Stuart Brady <sdb@zubnet.me.uk>, author of the
target-hppa fork.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:29:05 +01:00
Aurelien Jarno
82b323cd29 target-ppc: use float32_is_any_nan()
Use the new function float32_is_any_nan() instead of
float32_is_quiet_nan() || float32_is_signaling_nan().

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:12:14 +01:00
Aurelien Jarno
3eb28bbd47 target-ppc: fix default qNaN
On PPC the default qNaN doesn't have the sign bit set.

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:10:54 +01:00
Aurelien Jarno
dd94ad96e5 target-ppc: remove PRECISE_EMULATION define
The PRECISE_EMULATION is "hardcoded" to one in target-ppc/exec.h and not
something easily tunable. Remove it and non-precise emulation code as
it doesn't make a noticeable difference in speed. People wanting speed
improvement should use softfloat-native instead.

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 16:10:48 +01:00
Alex Williamson
c574ba5a4c rtl8139: Use subsection to restrict migration after hotplug
rtl8139 includes a cpu_register_io_memory acquired value in it's
migration data.  This is not only unecessary, but we should treat
these values as unique to the VM instances since the value depends
on call order.  In most cases, this miraculously still works.
However, if devices are added or removed from the system, it may
represent an ordering change, which could cause the target rtl8139
device to make use of another device's cpu_register_io_memory value.
If we detect that a hot-add/remove has occured, include a subsection
to restrict migrations only to driver versions known to include this
fix.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-01-05 12:14:02 +02:00
Alex Williamson
0ac8ef7132 qdev: Track runtime machine modifications
Create a trivial interface to track whether the machine has been
modified since boot.  Adding or removing devices will trigger this
to return true.  An example usage scenario for such an interface is
the rtl8139 driver which includes a cpu_register_io_memory() value
in it's migration stream.  For the majority of migrations, where
no hotplug has occured in the machine, this works correctly.  Once
the machine is modified, we can use this interface to detect that
and include a subsection for the device to prevent migrations to
rtl8139 versions with this bug.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-01-05 12:14:00 +02:00
Edgar E. Iglesias
23979dc541 microblaze: Use more TB chaining
For some workloads with tight loops this ~doubles the emulation
speed.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
2011-01-05 02:23:09 +01:00
Aurelien Jarno
92d675d1c1 cirrus_vga: fix division by 0 for color expansion rop
Commit d85d0d3883 introduces a regression
with Windows ME that leads to a division by 0 and a crash.

It uses the color expansion rop with the source pitch set to 0. This is
something allowed, as the manual explicitely says "When the source of
color-expand data is display memory, the source pitch is ignored.".

This patch fixes this regression by computing sx, sy and others
variables only if they are going to be used later, that is for a plain
copy ROP. It basically consists in moving code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-04 21:58:24 +01:00
Aurelien Jarno
9ae19b657e Fix curses on big endian hosts
On big endian hosts, the curses interface is unusable: the emulated
graphic card only displays garbage, while the monitor interface displays
nothing (or rather only spaces).

The curses interface is waiting for data in native endianness, so
console_write_ch() should not do any conversion. The conversion should
be done when reading the video buffer in hw/vga.c. I supposed this
buffer is in little endian mode, though it's not impossible that the
data is actually in guest endianness. I currently have no big endian
guest to way (they all switch to graphic mode immediately).

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-04 21:58:24 +01:00
Michael Walle
8a7d0890ac noaudio: correctly account acquired samples
This will fix the return value of the function which otherwise returns too
many samples because sw->total_hw_samples_acquired isn't correctly
accounted.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: malc <av1474@comtv.ru>
2011-01-04 03:53:47 +03:00
Peter Maydell
011da610ba target-arm: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for ARM targets by
providing an appropriate pickNaN function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02 23:59:03 +01:00
Peter Maydell
354f211b1a softfloat: abstract out target-specific NaN propagation rules
IEEE754 doesn't specify precisely what NaN should be returned as
the result of an operation on two input NaNs. This is therefore
target-specific. Abstract out the code in propagateFloat*NaN()
which was implementing the x87 propagation rules, so that it
can be easily replaced on a per-target basis.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02 23:58:57 +01:00
Peter Maydell
185698715d softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()
The softfloat functions float*_is_nan() were badly misnamed,
because they return true only for quiet NaNs, not for all NaNs.
Rename them to float*_is_quiet_nan() to more accurately reflect
what they do.

This change was produced by:
 perl -p -i -e 's/_is_nan/_is_quiet_nan/g' $(git grep -l is_nan)
(with the results manually checked.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02 11:15:25 +01:00
Aurelien Jarno
f96a38347a TCG: Improve tb_phys_hash_func()
Most of emulated CPU have instructions aligned on 16 or 32 bits, while
on others GCC tries to align the target jump location. This means that
1/2 or 3/4 of tb_phys_hash entries are never used.

Update the hash function tb_phys_hash_func() to ignore the two lowest
bits of the address. This brings a 6% speed-up when booting a MIPS
image.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-31 22:23:38 +01:00
Aurelien Jarno
8aac08b10b target-arm: fix UMAAL instruction
UMAAL should use unsigned multiply instead of signed.

This patch fixes this issue by handling UMAAL separately from
UMULL/UMLAL/SMULL/SMLAL as these instructions are different
enough. It also explicitly list instructions in case and catch
nonexistent instruction as illegal. Also fixes a few style issues.

This fixes the issues reported in
https://bugs.launchpad.net/qemu/+bug/696015

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-31 22:22:26 +01:00
Mike Pall
6d5c34fa02 Fix translation of unary PPC/SPE instructions (efdneg etc.).
Signed-off-by: Mike Pall <mike-lp10@luajit.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-31 21:17:53 +01:00
Aurelien Jarno
0fcec41eec target-sparc: fix udiv(cc) and sdiv(cc)
Since commit 5a4bb580cd, Xorg crashes on
a Debian Etch image. The commit itself is fine, but it triggers a bug
due to wrong computation of flags for udiv(cc) and sdiv(cc).

This patch only compute cc_src2 for the cc version of udiv/sdiv. It
also moves the update of cc_dst and cc_op to the helper, as it is
faster doing it here when there is already an helper.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-28 18:44:51 +00:00
Aurelien Jarno
818c2e1b97 Merge branch 'spice.v23.pull' of git://anongit.freedesktop.org/spice/qemu
* 'spice.v23.pull' of git://anongit.freedesktop.org/spice/qemu:
  vnc/spice: add set_passwd monitor command.
  vnc: support password expire
  vnc: auth reject cleanup
  spice: add qmp 'query-spice' and hmp 'info spice' commands.
  spice: connection events.
  spice: add qxl device
  spice: add qxl vgabios binary.
2010-12-27 22:59:48 +01:00
Jan Kiszka
4058fd98fd x86: Filter out garbage from segment flags dump
Only bits 8..23 of the segment flags contain valid data, so only dump
those when printing the CPU state.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 22:02:52 +01:00
Luiz Capitulino
5569fd7c38 Fix migrate set speed doc arg
We used to ignore any fractional part in 0.13, but due to recent
changes (started with 9f9b17a4f0)
migrate_set_speed will reject the fractional part.

We don't expect existing clients to be relying on this, but we
need to update the documentation to reflect the change.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:43:56 +01:00
Juha Riihimäki
16440c5fa0 target-arm: correct cp15 c1_sys reset value for arm1136 and cortex-a9
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:21:17 +01:00
Mattias Holm
9c486ad6e4 target-arm: correct cp15 c1_sys reset value for cortex-a8
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27 21:21:17 +01:00