2 Commits

Author	SHA1	Message	Date
Bin Meng	806c64b7b0	riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes ... Now that we have added a PRCI node, update existing UART and ethernet nodes to reference PRCI as their clock sources, to keep in sync with the Linux kernel device tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	2019-09-17 08:42:48 -07:00
Bin Meng	0d95299468	riscv: sifive: Implement PRCI model for FU540 ... This adds a simple PRCI model for FU540 (sifive_u). It has different register layout from the existing PRCI model for FE310 (sifive_e). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	2019-09-17 08:42:47 -07:00