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13 Commits

Author SHA1 Message Date
Philippe Mathieu-Daudé
18f86aecd6 target/mips: Fix TX79 LQ/SQ opcodes 
The base register address offset is *signed*.

Cc: qemu-stable@nongnu.org
Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914090447.12557-1-philmd@linaro.org>
 2023-11-07 12:13:28 +01:00
Philippe Mathieu-Daudé
34fe9fa368 target/mips: Rename 'rtype' as 'r' 
We'll soon have more opcode and decoded arguments, and 'rtype'
is not very helpful. Naming it simply 'r' ease reviewing the
.decode files when we have many opcodes.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210801234202.3167676-5-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
 2021-08-25 13:02:14 +02:00
Philippe Mathieu-Daudé
80ad630357 target/mips/tx79: Introduce SQ opcode (Store Quadword) 
Introduce the SQ opcode (Store Quadword).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-27-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
aaaa82a9f9 target/mips/tx79: Introduce LQ opcode (Load Quadword) 
Introduce the LQ opcode (Load Quadword) and remove unreachable code.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-26-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
dce4808f74 target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words) 
Introduce the PROT3W opcode (Parallel Rotate 3 Words).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-25-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
71c49f39b9 target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word) 
Introduce the PPACW opcode (Parallel Pack to Word).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-22-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
8bd42c00f2 target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than) 
Introduce the 'Parallel Compare for Greater Than' opcodes:

 - PCGTB (Parallel Compare for Greater Than Byte)
 - PCGTH (Parallel Compare for Greater Than Halfword)
 - PCGTW (Parallel Compare for Greater Than Word)

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210309145653.743937-15-f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
82fbf9fc80 target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal) 
Introduce the 'Parallel Compare for Equal' opcodes:

 - PCEQB (Parallel Compare for Equal Byte)
 - PCEQH (Parallel Compare for Equal Halfword)
 - PCEQW (Parallel Compare for Equal Word)

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210309145653.743937-14-f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
a9ea77f2dc target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower) 
Introduce the 'Parallel Extend Lower' opcodes:

 - PEXTLB (Parallel Extend Upper from Byte)
 - PEXTLH (Parallel Extend Upper from Halfword)
 - PEXTLW (Parallel Extend Upper from Word)

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210309145653.743937-13-f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
0bc6937296 target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word) 
Introduce the PEXTUW opcode (Parallel Extend Upper from Word).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210309145653.743937-12-f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
709324dc05 target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract) 
Introduce the 'Parallel Subtract' opcodes:

 - PSUBB (Parallel Subtract Byte)
 - PSUBH (Parallel Subtract Halfword)
 - PSUBW (Parallel Subtract Word)

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <820210309145653.743937-11-f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
2d4ab117be target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic) 
Introduce the parallel logic opcodes:

 - PAND (Parallel AND)
 - POR  (Parallel OR)
 - PXOR (Parallel XOR)
 - PNOR (Parallel NOR)

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-16-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
 2021-07-11 22:29:54 +02:00
Philippe Mathieu-Daudé
a2b0a27d33 target/mips: Move TCG source files under tcg/ sub directory 
To ease maintenance, move all TCG specific files under the tcg/
sub-directory. Adapt the Meson machinery.

The following prototypes:
- mips_tcg_init()
- mips_cpu_do_unaligned_access()
- mips_cpu_do_transaction_failed()
can now be restricted to the "tcg-internal.h" header.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-29-f4bug@amsat.org>
 2021-05-02 16:49:35 +02:00