blueswir1
f48f3ede71
Display TCGCond name in tcg dumper (original patch by Tristan Gingold)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5208 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 07:45:17 +00:00
blueswir1
9d0efc88e4
Use 64 bit loads for tlb addend only if addend size is 64 bits
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5203 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13 20:07:53 +00:00
blueswir1
baf8cc5275
Fix stack alignment on Sparc32 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5202 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13 20:05:32 +00:00
pbrook
733fef0e40
TCG: Use x86-64 zero extension instructions.
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Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5180 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-07 18:07:39 +00:00
pbrook
b6d17150af
Implement TCG sign extension ops for x86-64.
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Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5179 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-07 17:45:15 +00:00
aurel32
00dbbb03b6
Revert "TCG: enable debug"
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This reverts commit 5166, commited by error.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5169 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05 14:22:24 +00:00
aurel32
b24a39fab0
TCG: enable debug
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5166 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05 14:19:35 +00:00
blueswir1
79383c9c08
Fix some warnings that would be generated by gcc -Wredundant-decls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:51:20 +00:00
malc
70fa887c14
Relax qemu_ld/st constraints for !SOFTMMU case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5038 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 01:14:07 +00:00
malc
735ee40d92
Relax qemu_ld/st constraints for !SOFTMMU case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5034 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20 22:39:22 +00:00
malc
109719ec9e
Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5033 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20 22:39:19 +00:00
malc
0b7c1d897f
Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5032 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20 22:39:17 +00:00
malc
a2a546b3fc
Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warning
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5031 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20 22:39:14 +00:00
blueswir1
8fcd36920e
Fix some warnings that would be generated by gcc -Wmissing-prototypes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5022 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 20:26:25 +00:00
blueswir1
6f41b7772d
Fix 64 bit constant generation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5020 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 20:14:16 +00:00
blueswir1
90cbed4656
Fix 32 bit address overflow
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5019 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 16:13:02 +00:00
blueswir1
bffe143153
Restore AREG0 after calls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 14:34:27 +00:00
blueswir1
56fc64dfd0
Sparc code generator update (fix qemu_ld & qemu_st)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5014 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-16 19:54:01 +00:00
blueswir1
53c3748794
Sparc code generator update
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-15 18:14:44 +00:00
malc
bf6bca527c
Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4985 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-03 19:04:11 +00:00
malc
f9bf298717
Preliminary MacOS X on PPC32 support
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Big thanks to BlueSwirl for Sparc failure analysis.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4984 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-03 19:04:07 +00:00
malc
52781543ad
On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64
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Avoids nasty warnings about flush_icache_range from gcc4 and inability
to compile [cpu-]exec.c with gcc3 and -O, also the function is much
too large to be candidate for inlining anyway.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4974 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-29 20:08:17 +00:00
malc
fe6f943f3b
Immediate versions of some operations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4962 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 23:46:06 +00:00
malc
000a2d866a
Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4961 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 23:46:03 +00:00
malc
e924bbec7a
Set the L field of CMP[L][I] when dealing with 64 bit quantities
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This (along with previous 2 commits) makes X86_64 work on ppc64 too.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4960 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 19:42:23 +00:00
malc
880e52b8b0
Fix preprocessor guard condition
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4959 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 19:42:20 +00:00
malc
95153fde07
Remove leftover from previous way to load 64 bit constants
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4958 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 19:42:17 +00:00
malc
4a40e23194
Special-case some paths inside tcg_out_tlb_read
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a. Use 32bit arithmetics in TARGET_LONG_BITS == 32 case
b. Optimize byte access case in TARGET_LONG_BITS == 64 case
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4955 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-27 11:09:21 +00:00
malc
301f6d903a
Fix the opcode value of LWA
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That should teach one to not blindly trust documentation that will
(out of the blue) use decimal and binary representation for numbers in
the same chart for no apparent reason and without any prefixes, sigh..
Unbreaks MIPS.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4954 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-27 10:28:15 +00:00
blueswir1
e97b640d47
Try to avoid glibc global register mangling, again
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4953 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 17:19:35 +00:00
malc
c070355d39
Relax memory operations constraints
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4950 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:21:03 +00:00
malc
b01d9fea6c
Fix qemu_ld64 constraint list
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4949 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:21:00 +00:00
malc
e03ae7f9b3
Use proper offset for LR save slot
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4948 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:20:57 +00:00
malc
5424fd1018
Reduce amount of space reserved for tb jump
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4947 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:20:54 +00:00
malc
6fc9dbcc17
Fix and improve 64 bit immediate loading
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4946 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:20:50 +00:00
malc
450e62e768
Fix EXTSW arguments
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4945 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:20:44 +00:00
malc
e7d05e6f1d
Use proper value for TCG_TARGET_CALL_STACK_OFFSET
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4941 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24 22:56:21 +00:00
malc
a69abbe0b3
Emit and use adhoc function descriptor for code_gen_prologue on PPC64
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Thus avoiding fragile inline assembly hackery to call into generated
code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4939 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24 17:37:09 +00:00
malc
6926be2a59
Remove neg_i32 debugging leftover
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4935 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 20:01:27 +00:00
malc
e46b9681e5
Provide extNs_M instructions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4934 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 20:01:23 +00:00
malc
1d58ee9f3b
Remove stray "i" from mul_i64
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4933 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 20:01:19 +00:00
malc
810260a8f3
Preliminary PPC64/Linux host support
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ppc64.ld from Heikki Lindholm's patch
http://marc.info/?l=qemu-devel&m=114086179024634&w=2
Issues:
x86_64 tripple faults shortly after decompressing the kernel
No immediate versions of most 64 bit operations
More...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4932 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 19:17:46 +00:00
bellard
d643ccca01
64 bit signed comparison fix (Juergen Lock)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-07 20:15:54 +00:00
blueswir1
d795eb86d7
Fix 64 bit constant generation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4854 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-07 19:34:45 +00:00
malc
e924c48573
Fuse EQ and NE handling in tcg_out_brcond2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4845 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03 23:49:14 +00:00
malc
8c5e95d807
Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4841 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03 18:51:23 +00:00
pbrook
a50f5b9186
Suppress bogus compiler warnings.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4803 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 15:25:29 +00:00
malc
ca88500f43
According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatile
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4779 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23 05:47:06 +00:00
malc
a35e86c55f
Shuffle contents of tcg_target_reg_alloc_order
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Move reserved/volatile registers down. Currently qemu_ld/stXX are
marked with TCG_OPF_CALL_CLOBBER and since memory accesses are
frequent and R3 through R12 are volatile moving this down results in
less spills and tighter generated code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4778 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23 05:47:03 +00:00
malc
17ca26e791
Save LR into proper place on callers stack frame
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4745 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-18 01:58:52 +00:00