Commit Graph

24 Commits

Author SHA1 Message Date
Avi Kivity
73c92f9aec sh_pci: Fix sh_pci memory alias confusion
The a7 area was set up as an alias of itself, rather than the p4 area.  This
sent the memory core into infinite recursion.

Fix by aliasing the a7 area to the p4 area.

Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-28 18:34:39 +03:00
Avi Kivity
fb57117a19 sh_pci: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-22 10:47:48 -05:00
Avi Kivity
aee97b840f pci: pass I/O address space to new PCI bus
This lets us register BARs in the I/O address space.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-08 10:15:53 -05:00
Avi Kivity
1e39101c64 pci: pass address space to pci bus when created
This is now done sloppily, via get_system_memory().  Eventually callers
will be converted to stop using that.

Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-29 08:25:44 -05:00
Isaku Yamahata
ae2ebad733 hw/sh_pci.c: convert to PCIDeviceInfo to initialize ids
use PCIDeviceInfo to initialize ids.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-06-12 10:33:36 +03:00
Aurelien Jarno
cf154394bd sh_pci: qdev conversion
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Alexander Graf
968d683c04 isa_mmio: Always use little endian
This patch converts the ISA MMIO bridge code to always use little endian mmio.
All bswap code that existed was only there to convert from native cpu
endianness to little endian ISA devices.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-11 15:24:26 +00:00
Alexander Graf
2507c12ab0 Add endianness as io mem parameter
As stated before, devices can be little, big or native endian. The
target endianness is not of their concern, so we need to push things
down a level.

This patch adds a parameter to cpu_register_io_memory that allows a
device to choose its endianness. For now, all devices simply choose
native endian, because that's the same behavior as before.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-11 15:24:25 +00:00
Aurelien Jarno
5ba9e9522c sh_pci: fix memory and I/O access
Since commit 8da3ff1809 ("MMIO callback
interface changes"), the addresses passed to the I/O functions are an
offset to the start of the area. As a consequence, there is no need to
correct the address using the value of IOBR. This make possible the use
of the default MMIO functions. Moreover the addresses are now remaped
when the value if IOBR change.

The memory area corresponds to the devices behing the PCI bus, it should
not be mapped by the PCI controller. Remove the corresponding code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-13 20:17:24 +02:00
Isaku Yamahata
b6243d991a pci: move pci_data_{read, write}() declaration from pci.h to pci_host.h
Now pci host stuff has been moved from pci.[hc] to pci_host.[hc]
so the declaration of pci_data_{read, write}() should be in
pci_host.h
This patch moves them from pci.h to pci_host.h for consistency.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-12-01 17:51:15 +02:00
Michael S. Tsirkin
18e08a5529 pci: pci.h cleanup: move out stuff not in pci.c
pci.h declares some functions which aren't
defined in pci.h. Clean up moving things
to appropriate headers, and update all users.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-12-01 17:51:04 +02:00
Anthony Liguori
c227f0995e Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem.  Something
like this _must_ be presented on the list first so people can provide input
and cope with it.

This reverts commit 99a0949b72.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01 16:12:16 -05:00
malc
99a0949b72 Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time
being.

Signed-off-by: malc <av1474@comtv.ru>
2009-10-01 22:45:02 +04:00
Blue Swirl
afcea8cbde ioports: remove unused env parameter and compile only once
The CPU state parameter is not used, remove it and adjust callers. Now we
can compile ioport.c once for all targets.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-20 16:05:47 +00:00
Juan Quintela
5d4e84c8b9 We want the argument pass to set_irq to be opaque
piix_pci want to pass more things that the pic

Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-09-04 09:37:23 -05:00
Blue Swirl
d60efc6b0d Make CPURead/WriteFunc structure 'const'
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-25 18:29:31 +00:00
Avi Kivity
1eed09cb4a Remove io_index argument from cpu_register_io_memory()
The parameter is always zero except when registering the three internal
io regions (ROM, unassigned, notdirty).  Remove the parameter to reduce
the API's power, thus facilitating future change.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-16 15:18:37 -05:00
Paul Brook
02e2da45c4 Add common BusState
Implement and use a common device bus state.  The main side-effect is
that creating a bus and attaching it to a parent device are no longer
separate operations.  For legacy code we allow a NULL parent, but that
should go away eventually.

Also tweak creation code to veriry theat a device in on the right bus.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-23 00:13:41 +01:00
aliguori
a770dc7ea6 Add and use remaining #defines for PCI device IDs (Stuart Brady)
This patch adds and uses #defines for the remaining hardcoded PCI
device IDs.  It also moves definitions taken from linux/pci_ids.h
into a separate header (hw/pci_ids.h), removes the 'RTL' from
PCI_DEVICE_ID_REALTEK_RTL8029, and renames PCI_DEVICE_ID_FSL_E500
to PCI_DEVICE_ID_MPC8533E to match Linux's definition.

Changes in v2:
 * Don't use C99-style comments
 * Move definitions from linux/pci_ids.h into a separate header
 * Rename PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6841 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13 15:02:23 +00:00
aliguori
deb54399df Define PCI vendor and device IDs in pci.h (Stuart Brady)
This patch defines PCI vendor and device IDs in pci.h (matching those
from Linux's pci_ids.h), and uses those definitions where appropriate.

Change from v1:
  Introduces pci_config_set_vendor_id() / pci_config_set_device_id()
  accessors as suggested by Anthony Liguori.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6442 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26 15:37:35 +00:00
aurel32
ac2e852285 sh4: sh_pci. Register resouces both at A7 and P4.
Add resource registration both for P4 and A7.
This is needed because of #5935 SH4: Eliminate P4 to A7 mangling.
Additionally, {reg,iop,mem}base which is no longer used are removed.

Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6433 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-24 18:21:08 +00:00
blueswir1
1d6198c3b0 Remove unnecessary trailing newlines
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 09:32:43 +00:00
balrog
d0ef528a3e SH: Don't subtract bases from access addresses in PCIC.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5928 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 19:13:12 +00:00
balrog
1e5459a3fa SH: On-chip PCI controller support (Takashi YOSHII).
This patch adds SuperH on-chip PCI controller(PCIC) support.

Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5927 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 19:08:45 +00:00