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486 Commits

Author SHA1 Message Date
aurel32
ce9ede844c target-ppc: update comment about precise emulation 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6058 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 21:48:27 +00:00
aurel32
d445bde7e8 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6055 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:14:58 +00:00
aurel32
196e3422f7 target-ppc: enable PRECISE_EMULATION by default 
With this option enabled, all glibc math tests pass.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6054 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:14:50 +00:00
aurel32
da1e7ac9d4 target-ppc: fmadd/fmsub/fmnadd/fmnsub can generate VXIMZ or VXIZI exceptions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6053 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:14:43 +00:00
aurel32
17218d1fd9 target-ppc: fadd/fsub: correctly propagate NaN 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6052 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:14:35 +00:00
aurel32
f23c346e69 target-ppc: use the new fp functions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6051 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:14:27 +00:00
aurel32
3b27fc36e3 target-ppc: correctly propagate NaN in division 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6048 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:14:05 +00:00
aurel32
e0147e4138 target-ppc: fix fload_invalid_op_excp() 
The argument is a value, not a flag. Update the tests accordingly. Also
set a correct default value for NaN.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6047 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:13:55 +00:00
aurel32
05b936038f target-ppc: use a correct value to represent 1.0 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6046 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:13:48 +00:00
aurel32
eb44b959de target-ppc: update nip before calling an helper in FP instructions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6045 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:13:39 +00:00
aurel32
330c483bbf target-ppc: fix TCGv type in fcmpu/fcmpo 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6044 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:13:31 +00:00
aurel32
ab5f265daa target-ppc: add signed fields to ppc_avr_t. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6042 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 07:03:06 +00:00
aurel32
6ad193ed43 target-ppc: fix frsp instruction 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6036 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 01:00:17 +00:00
aurel32
27ee5df007 target-ppc: fix mtfsf and mtfsfi instructions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6035 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 00:30:28 +00:00
aurel32
9a819377d8 target-ppc: fix fcmp{o,u} instructions 
The instructions are specified to update the condition register even if
an error is to be signaled because of NaN input.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6034 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 19:34:09 +00:00
aurel32
b12363e1b7 target-ppc: remove FPRF optimization 
FPRF optimization is totally broken, remove it.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6033 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:59:08 +00:00
aurel32
6e35d5243c target-ppc: fix mtfsb0 and mtfsb1 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6032 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:40:58 +00:00
aurel32
7889270acb target-ppc: display FPSCR in register dump 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6031 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:40:49 +00:00
aurel32
2637004698 target-ppc: fix mbar opcode 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6027 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 11:12:20 +00:00
aurel32
6ad7365a81 target-ppc: fix fsel instruction 
Fix fsel instruction.  Eliminate unneeded temporaries while we're at it,
too.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6026 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 11:12:10 +00:00
aurel32
5e9ae189f8 target-ppc: keep only the table version for mfrom 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6007 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 12:30:21 +00:00
aurel32
be94c952e4 target-ppc: use accessors to access fp_status exception_flags 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6006 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 12:13:33 +00:00
aurel32
cf1cf21eac target-ppc: fix compilation with PRECISE_EMULATION 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6004 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 11:46:36 +00:00
aurel32
a44d2ce18a target-ppc: fix compilation with CONFIG_SOFTFLOAT 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6003 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 11:46:27 +00:00
aurel32
9322057384 target-ppc: remove remaining warnings 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5991 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:33 +00:00
aurel32
94fa46e2c2 target-ppc: remove unneeded include 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5990 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:25 +00:00
aurel32
e06fcd754e target-ppc: rework exception code 
... also remove two warnings.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5989 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:14 +00:00
aurel32
2a3ec4b5b3 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5988 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:04 +00:00
aurel32
4c2ab98869 target-ppc: enable SPE and Altivec in user mode 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5965 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-10 15:02:33 +00:00
aurel32
fe463b7dbc target-ppc: initialize MSR appropriately in user-mode 
Mask the initial MSR with the mask from the PowerPC CPU definition.

Noticed by Nathan Froyd.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5964 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-10 15:02:24 +00:00
aurel32
db9a16a70c target-ppc: kill a warning 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5952 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:50 +00:00
aurel32
0e69805af6 target-ppc: cleanup op_helper.c after TCG conversion 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5951 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:42 +00:00
aurel32
b4cec7b455 target-ppc: enable access type in MMU 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5950 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:33 +00:00
aurel32
76db3ba44e target-ppc: memory load/store rework 
Rework the memory load/store:
- Unify load/store functions for 32-bit and 64-bit CPU
- Don't swap values twice for bit-reverse load/store functions
  in little endian mode.
- On a 64-bit CPU in 32-bit mode, do the address truncation for
  address computation instead of every load store. Truncate the
  address when incrementing the address (if needed)
- Cache writes to access_types.
- Add a few missing calls to gen_set_access_type()

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5949 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:21 +00:00
aurel32
0c34a5d722 target-ppc: kill a few warnings 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5941 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 23:00:00 +00:00
aurel32
e8fc4fa7a1 target-ppc: disable single stepping 
... which left was enabled by mistake.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5918 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 16:23:22 +00:00
aurel32
ec72e276c5 target-ppc: Fix use of uninitialized TCG variable in tlbiva 
Silences a warning about possible unitialized use of t0.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5915 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 15:45:15 +00:00
aurel32
45d827d2d7 target-ppc: convert SPR accesses to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5910 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 13:40:29 +00:00
aurel32
fa0d32c4e4 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5909 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 13:40:15 +00:00
aurel32
8983da70c4 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5896 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 22:01:01 +00:00
aurel32
74d37793f4 target-ppc: convert SLB/TLB instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5895 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 21:46:17 +00:00
aurel32
06dca6a7c1 target-ppc: convert dcr load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5893 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 16:37:18 +00:00
aurel32
6527f6ea9c target-ppc: convert msr load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5892 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 13:03:35 +00:00
aurel32
22e0e17337 target-ppc: convert POWER bridge instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5891 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 12:19:14 +00:00
aurel32
7487953d70 target-ppc: convert POWER shift instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5882 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-05 07:21:44 +00:00
aurel32
54cdcae646 target-ppc: add functions to load/store SPR 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5881 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-05 07:21:31 +00:00
aurel32
b8dbdddc9e target-ppc: remove unused file op_mem_access.h 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5838 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 17:54:28 +00:00
aurel32
dcc532c809 target-ppc: use ldl/ldub/stl/stub for load/store in op_helper.c 
Should not give any performance penality given cpu_mmu_index() is
an inline function returning a value from env.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5837 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 17:54:21 +00:00
aurel32
ef0d51af1e target-ppc: convert PPC 440 instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5836 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 17:26:29 +00:00
aurel32
d72a19f7bd target-ppc: convert return from interrupt instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5832 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:55 +00:00
aurel32
fa407c030c target-ppc: convert external load/store instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5831 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:47 +00:00
aurel32
cf360a32af target-ppc: convert load/store with reservation instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5830 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:39 +00:00
aurel32
bdb4b68907 target-ppc: convert lscbx instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5829 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:30 +00:00
aurel32
dfbc799d8e target-ppc: convert load/store string instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5828 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:21 +00:00
aurel32
37d269dfc6 target-ppc: convert icbi instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5827 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:13 +00:00
aurel32
799a8c8d0a target-ppc: convert dcbz instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5826 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:05 +00:00
aurel32
ff4a62cd81 target-ppc: convert load/store multiple instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5825 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:56 +00:00
aurel32
931ff27258 target-ppc: convert wait instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5824 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:46 +00:00
aurel32
cf02a65c77 target-ppc: convert mfrom instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5823 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:35 +00:00
aurel32
e49a3c8f85 target-ppc: remove dead code from op.c 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5822 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:25 +00:00
aurel32
2cbd949d7a Common cpu_loop_exit prototype 
All archs use the same cpu_loop_exit, so move the prototype in a common
header. i386 was carrying a __hidden attribute, but that was empty for
this arch anyway.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:09 +00:00
aurel32
0f3955e2d2 target-ppc: convert software TLB instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5819 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:22:56 +00:00
aurel32
01a4afeb99 target-ppc: convert POWER2 load/store instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5805 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-27 19:30:56 +00:00
aurel32
6a6ae23f3c target-ppc: convert SPE load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5804 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-27 19:30:47 +00:00
aurel32
38d1495201 target-ppc: simplify evsplati and evsplatfi 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5803 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-27 19:30:38 +00:00
aliguori
c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka) 
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-25 22:13:57 +00:00
aurel32
cab3bee2d6 target-ppc: convert trap instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5788 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-24 11:28:19 +00:00
aurel32
fe1e5c53fd target-ppc: convert altivec load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5787 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-24 08:47:21 +00:00
aurel32
a0d7d5a776 target-ppc: convert FPU load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5786 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-23 16:30:50 +00:00
aurel32
a7859e892b target-ppc: fix access_type usage 
Write env->access_type before a load/store operation instead of relying
on the name of the dyngen operation.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5785 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-23 16:30:40 +00:00
aurel32
0c8aacd466 target-ppc: include the instruction name in load/store handlers name 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5784 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-23 16:30:28 +00:00
aurel32
1c97856dcc target-ppc: convert SPE FP ops to TCG 
Including a few bug fixes:
- Don't clear high part for instruction with 32-bit destination
- Fix efscmp* and etstcmp* return value

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5783 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-23 10:54:04 +00:00
aurel32
293d6942dd target-ppc: remove declaration of removed function from op_helper.h 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5781 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-22 21:27:36 +00:00
aurel32
64adab3fcb target-ppc: convert exceptions generation to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5772 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-22 10:09:17 +00:00
aurel32
0f2f39c234 target-ppc: fix TCG type errors introduced in r5754 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5756 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-19 17:54:49 +00:00
aurel32
af12906f77 target-ppc: convert fp ops to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5754 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-19 16:10:23 +00:00
aliguori
a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka) 
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 20:07:32 +00:00
aliguori
6b9175478e Refactor translation block CPU state handling (Jan Kiszka) 
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 19:46:41 +00:00
aliguori
622ed3605b Convert CPU_PC_FROM_TB to static inline (Jan Kiszka) 
as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 19:36:03 +00:00
aurel32
87006d1378 target-ppc: fix regression introduced by commit 5729 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5733 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 09:32:01 +00:00
pbrook
a7812ae412 TCG variable type checking. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-17 14:43:54 +00:00
blueswir1
cd390083ad Attached patch fixes a series of this warning 
when compiling on NetBSD:

warning: array subscript has type 'char'

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5727 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-16 13:53:32 +00:00
aurel32
57951c2742 target-ppc: convert most SPE integer instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5668 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-10 11:10:23 +00:00
aurel32
741a7444a3 target-ppc: fix TCG argument 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5661 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 18:27:28 +00:00
aurel32
a973001797 target-ppc: Remove a few TCG temp variable leaks 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5660 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:36 +00:00
aurel32
ec6469a3b1 target-ppc: fixes for gen_op_neg() 
- Rename to gen_op_arith_neg for consistency with other functions.
- Correctly free TCG temp variable.
- Fix the return value in 64-bit mode in case of overflow.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5659 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:27 +00:00
aurel32
2ef1b120d1 target-ppc: gen_op_arith_divw() & gen_op_arith_divd fixes 
gen_op_arith_divw():
- "deoptimize" gen_op_arith_divw to make it more readable.
- Correctly free TCG temp variable

gen_op_arith_divd():
- Call the right function.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5658 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:19 +00:00
aurel32
1e4c090f7d target-ppc: optimize mullw and make the code more readable 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5657 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:11 +00:00
aurel32
bdc4e053d1 target-ppc: indentation fixes 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5656 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:03 +00:00
aurel32
4870167d04 target-ppc: fix tcg fatal error on i386 host 
It looks like the i386 runs out of registers for allocation due
to too many global registers allocated by the ppc target.

Here is a quick and dirty fix that seems to solve the problem.
This should be considered as temporary.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5648 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-08 08:57:45 +00:00
aurel32
e32ad5c268 target-ppc: fix flags computation for tcg_gen_qemu_st 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5644 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-07 13:48:25 +00:00
aurel32
54843a5861 target-ppc: use the new rotr/rotri instructions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5608 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-03 07:08:44 +00:00
aurel32
fdce4963ea target-ppc: use the new subfi wrapper 
(...and fix rldnm)

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5600 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:23:14 +00:00
aurel32
0cfe58cd44 target-ppc: simplify slw, srw, sld, srd 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5597 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:22:45 +00:00
aurel32
fea0c503a0 target-ppc: be more consistent with temp variables naming 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5596 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:22:34 +00:00
aurel32
4da0033e6e target-ppc: fix srw on 64-bit targets 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5595 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:22:16 +00:00
aurel32
6176a26d1d target-ppc: optimize popcntb 
Suggested by Andrzej Zaborowski.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5592 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-01 00:54:33 +00:00
aurel32
182608d44c target-ppc: convert 405 MAC instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5591 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-01 00:54:23 +00:00
aurel32
7463740644 target-ppc: convert arithmetic functions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5590 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-01 00:54:12 +00:00
aurel32
8d71247eaa target-ppc: xer access prototypes no more used & implemented 
Revision 5500 of the qemu repository removed all code using
ppc_load_xer & ppc_store_xer as well as their implementation.

Another patch fixes it's usage in kvm-userspace for powerpc, but I think
that header can now be cleaned up, therefore this patch to qemu-devel.

Signed-off-by: Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5589 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-01 00:53:59 +00:00