ths
bfed01fc79
Clean up of some target specifics in exec.c/cpu-exec.c.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 17:44:37 +00:00
ths
57fa1fb31c
More MIPS 64-bit FPU support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19 20:29:41 +00:00
ths
fd4a04ebb2
- Move FPU exception handling into helper functions, since they are big.
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- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
status bit can change.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-18 11:55:54 +00:00
ths
69d357286d
More generic 64 bit multiplication support, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-16 11:59:40 +00:00
ths
29929e3490
MIPS TLB style selection at runtime, by Herve Poussineau.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 13:49:44 +00:00
ths
5a5012ecbd
MIPS 64-bit FPU support, plus some collateral bugfixes in the
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conditional branch handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 13:55:33 +00:00
ths
01179c382b
Kill broken host register definitions, thanks to Paul Brook and Herve
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Poussineau for debugging this.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2747 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 21:26:37 +00:00
ths
80c27194a7
Fix qemu SIGFPE caused by division-by-zero due to underflow.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2673 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 21:21:33 +00:00
ths
60aa19abef
Actually enable 64bit configuration.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 12:36:18 +00:00
ths
a4bc3afc09
Malta CBUS UART support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-31 16:54:14 +00:00
ths
e397ee3382
Fix enough FPU/R2 support to get 24Kf going.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23 00:43:28 +00:00
ths
8294eba187
SPARC host fixes, by Ben Taylor.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 14:47:40 +00:00
ths
36d2395873
MIPS FPU dynamic activation, part 1, by Herve Poussineau.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-28 22:37:42 +00:00
ths
01d6a890b4
Sparc arm/mips/sparc register patch, by Martin Bochnig.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-02 01:03:34 +00:00
ths
4de9b249d3
Reworking MIPS interrupt handling, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24 01:47:51 +00:00
bellard
2ee4aed86f
moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppressed invalid tb_invalidate_page_range() calls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2287 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-03 15:18:08 +00:00
ths
70ead43412
Use memory barriers in FORCE_RET / RETURN.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2273 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-23 00:49:32 +00:00
ths
c570fd169c
Preliminiary MIPS64 support, disabled by default due to performance impact.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-21 01:19:56 +00:00
ths
7a387fffce
Add MIPS32R2 instructions, and generally straighten out the instruction
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decoding. This is also the first percent towards MIPS64 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 20:17:30 +00:00
ths
8c0fdd856c
Dynamically translate MIPS mtc0 instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2223 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 18:19:33 +00:00
ths
873eb01234
Dynamically translate MIPS mfc0 instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2222 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 17:59:07 +00:00
ths
814b9a4749
MIPS TLB performance improvements, by Daniel Jacobowitz.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 17:42:40 +00:00
bellard
6ea83fedc8
MIPS FPU support (Marius Goeger)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 12:56:19 +00:00
pbrook
d2ec1774eb
Add missing function prototype.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1772 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11 15:00:08 +00:00
bellard
01dbbdf1e5
disable debug mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1706 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-17 01:11:12 +00:00
bellard
4ad40f366f
MIPS fixes (Daniel Jacobowitz)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1690 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-05 19:59:36 +00:00
bellard
a9049a07bb
moved common softmmu code to common header (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 18:16:26 +00:00
bellard
aefce9af41
compilation fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1507 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-07 19:07:52 +00:00
bellard
e37e863f5e
correct split between helper.c and op_helper.c - cosmetics
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1505 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-04 22:17:33 +00:00
bellard
6af0bf9c7c
MIPS target (Jocelyn Mayer)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1464 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 14:58:51 +00:00