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129 Commits

Author SHA1 Message Date
balrog
6dc2d0daee x86 pextrw destination operand can be r64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5367 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-01 00:14:39 +00:00
balrog
2436b61a6b SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf). 
On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch
makes both 64-bit aware and enables them for Intel CPUs.
Add cpu save/load for 64-bit wide sysenter variables.

Signed-off-by: Alexander Graf <agraf@suse.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5318 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-25 18:16:18 +00:00
balrog
4242b1bd8a Implement x86 SSSE3 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5315 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-25 18:01:46 +00:00
ths
2cfc5f17d3 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-18 18:01:29 +00:00
bellard
28e1071183 fix cvtsq2s[sd] (Juergen Lock) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4856 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-07 20:25:41 +00:00
pbrook
d70040bcae Re-add static qualifier. Fix annother occurance of "const static". 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4850 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-05 17:03:54 +00:00
pbrook
efade670fe Fix rdtsc instruction counting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4810 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 17:51:26 +00:00
pbrook
2e70f6efa8 Add instruction counter. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 01:03:05 +00:00
bellard
94451178b6 HLT, MWAIT and MONITOR insn fixes (initial patch by Alexander Graf) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4746 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-18 09:32:32 +00:00
bellard
ec9d6075b4 undocumented 0x82 opcode is invalid in 64 bit code 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4687 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-06 12:54:30 +00:00
bellard
9575cb9493 fixed exceptions for cpuid and invlpg 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4664 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-04 17:12:40 +00:00
bellard
db620f46a8 reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-04 17:02:19 +00:00
bellard
914178d34b 32 bit SVM fixes - INVLPG and INVLPGA updates 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4660 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-04 13:53:05 +00:00
bellard
872929aa59 SVM rework 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-28 16:16:54 +00:00
bellard
2a449d1492 fixed x86_64 regression 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4586 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 21:01:05 +00:00
bellard
1e4840bf40 transformed TN into temporaries - add local temporaries usage when needed - optimized fcmovX 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4577 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 17:26:41 +00:00
pbrook
cb63669a54 Fix ARM conditional branch bug. 
Add tcg_gen_brcondi.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-24 02:22:00 +00:00
bellard
70cff25e78 use debug_insn_start to have nicer debug traces 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4532 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-22 17:00:49 +00:00
bellard
437a88a51c proper helper definition registering (all targets must do that) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4530 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-22 16:11:04 +00:00
bellard
c1c379686f optimization of shifts by a constant 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4524 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-22 12:36:31 +00:00
bellard
12e26b75d4 lahf/sahf cpuid test 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4523 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-22 10:13:38 +00:00
bellard
1b9d9ebb8a cmpxchg8b fix - added cmpxchg16b 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4522 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-22 09:52:38 +00:00
bellard
1130328ecb cmpxchg 64 bit fix 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4521 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-22 09:36:08 +00:00
bellard
8e1c85e372 converted conditional jumps, SET and CMOVx to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4518 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 19:16:45 +00:00
bellard
651ba608e2 converted env access to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4516 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 17:16:11 +00:00
bellard
bd7a7b33df convert eflags manipulation insns to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4515 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 17:07:20 +00:00
bellard
3bd7da9e18 convert remaining segment handling to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4514 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 16:34:06 +00:00
bellard
cec6843e87 converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LAR 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4513 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 16:25:27 +00:00
bellard
839bca8467 suppressed no longer used ops 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4511 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 13:34:27 +00:00
bellard
07be379fb1 converted INTO/CMPXCHG8B to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4510 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 13:29:45 +00:00
bellard
9d0763c4c0 converted BCD ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4509 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 13:24:30 +00:00
bellard
0211e5aff9 converted MUL/IMUL to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4508 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 10:12:54 +00:00
bellard
6e0d8677cb converted string OPs and LOOP insns to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4494 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-18 19:28:26 +00:00
bellard
cd31fefaf2 fixed INC/DEC condition codes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4493 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-18 19:19:57 +00:00
bellard
e108dd01ce converted sign extension ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4481 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-17 19:24:07 +00:00
bellard
bbf662ee31 MONITOR insn address generation fix - converted XLAT to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4479 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-17 19:05:28 +00:00
bellard
6191b05901 BSR/BSF TCG conversion 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4477 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-17 18:44:58 +00:00
bellard
f484d38622 converted bit test operations to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4473 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-17 16:10:38 +00:00
bellard
cad3a37d3e converted adc, sbb, cmpxchg to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4471 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-17 13:50:02 +00:00
bellard
b6abf97df1 converted condition code supprot to TCG - converted shift ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4470 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-17 12:44:31 +00:00
bellard
b8b6a50b55 converted more helpers to TCG - fixed some SVM issues 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4459 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-15 16:46:30 +00:00
bellard
3bd8c5e4f1 compilation fix 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4449 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 22:55:35 +00:00
bellard
b5b38f61b8 converted more helpers to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4447 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 22:05:13 +00:00
bellard
ba7cd150ff FPU fixes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4445 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 20:30:28 +00:00
bellard
19e6c4b8bc converted x87 FPU ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4444 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 19:10:44 +00:00
bellard
5af451868c converted SSE/MMX ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4441 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 16:47:36 +00:00
bellard
8686c490f7 use TCG for MMX/SSE memory accesses 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4439 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 13:55:27 +00:00
aurel32
d2856f1ad4 Factorize code in translate.c 
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-28 00:32:32 +00:00
aurel32
e771edab0d Check for 3DNow! CPUID at translation time 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4184 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-09 06:41:37 +00:00
aurel32
a35f3ec76b 3DNow! instruction set emulation 
(Michael Tross)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4180 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-08 19:51:29 +00:00