edgar_igl
05ba7d5f34
A first small step to convert the CRIS translator to TCG.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4057 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 01:11:25 +00:00
edgar_igl
786c02f1ac
Model more parts of the ETRAX mmu (still alot missing).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4056 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 01:08:09 +00:00
edgar_igl
e62b5b133b
* Add a model of the ETRAX interrupt controller.
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* Clean up the interrupt handling a bit.
* Connect some NOR flash to the test board.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4055 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 01:04:24 +00:00
edgar_igl
bbaf29c769
* target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags.
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* target-cris/helper.c: Update ERP for user-mode simulation aswell.
* hw/etraxfs_timer.c: Support multiple timers.
* hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4004 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-01 17:25:33 +00:00
edgar_igl
4f400ab520
Cut the translation block after translating a break insn. This avoids an issue where QEMU finds an illegal CRIS insn while the guest is returning through a signal return trampoline.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3997 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-28 09:37:58 +00:00
edgar_igl
9004627f9b
More consistent naming for CRIS register-number macros.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-28 08:28:32 +00:00
edgar_igl
5d4a534dec
Silently ignore CRIS cache flushes, instead of aborting due to unknown insn.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3990 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-25 09:58:22 +00:00
bellard
57fec1fee9
use the TCG code generator
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
balrog
fd56059fb6
Optimize clear insns by treating support reg P0 specially and
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add missing micro-op RETURN's (Edgar E. Iglesias).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3913 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-14 03:18:30 +00:00
bellard
44f8625d23
fixed invalid type
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3582 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 12:35:55 +00:00
bellard
aaed909a49
added cpu_model parameter to cpu_init()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
ths
273af66025
Adjust s390 addresses (the MSB is defined as "to be ignored").
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 14:39:49 +00:00
ths
941db52871
Use the shiny new clz helpers.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3464 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28 01:44:40 +00:00
j_mayer
6ebbf39000
Replace is_user variable with mmu_idx in softmmu core,
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allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
ths
94cff60a02
CRIS MMU emulation, by Edgar E. Iglesias.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3362 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 13:11:58 +00:00
ths
81fdc5f8d2
The remainder of CRIS CPU emulation files, by Edgar E. Iglesias.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3361 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 13:04:02 +00:00
ths
4fa551d768
CRIS micro-ops, by Edgar E. Iglesias.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3360 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 12:52:43 +00:00
ths
5478670f3d
CRIS insn decoding macros, by Edgar E. Iglesias.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3359 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 12:50:59 +00:00
ths
8170028d75
CRIS instruction translation, by Edgar E. Iglesias.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3358 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 12:49:08 +00:00
ths
450d4ff553
CRIS disassembler, originally from binutils, by Edgar E. Iglesias.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3356 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 12:45:38 +00:00