Commit Graph

1275 Commits

Author SHA1 Message Date
Markus Armbruster
837d37167d sysbus: Set cannot_instantiate_with_device_add_yet
device_add plugs devices into suitable bus.  For "real" buses, that
actually connects the device.  For sysbus, the connections need to be
made separately, and device_add can't do that.  The device would be
left unconnected, and could not possibly work.

Quite a few, but not all sysbus devices already set
cannot_instantiate_with_device_add_yet in their class init function.

Set it in their abstract base's class init function
sysbus_device_class_init(), and remove the now redundant assignments
from device class init functions.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-23 00:27:22 +01:00
Markus Armbruster
efec3dd631 qdev: Replace no_user by cannot_instantiate_with_device_add_yet
In an ideal world, machines can be built by wiring devices together
with configuration, not code.  Unfortunately, that's not the world we
live in right now.  We still have quite a few devices that need to be
wired up by code.  If you try to device_add such a device, it'll fail
in sometimes mysterious ways.  If you're lucky, you get an
unmysterious immediate crash.

To protect users from such badness, DeviceClass member no_user used to
make device models unavailable with -device / device_add, but that
regressed in commit 18b6dad.  The device model is still omitted from
help, but is available anyway.

Attempts to fix the regression have been rejected with the argument
that the purpose of no_user isn't clear, and it's prone to misuse.

This commit clarifies no_user's purpose.  Anthony suggested to rename
it cannot_instantiate_with_device_add_yet_due_to_internal_bugs, which
I shorten somewhat to keep checkpatch happy.  While there, make it
bool.

Every use of cannot_instantiate_with_device_add_yet gets a FIXME
comment asking for rationale.  The next few commits will clean them
all up, either by providing a rationale, or by getting rid of the use.

With that done, the regression fix is hopefully acceptable.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-23 00:27:22 +01:00
Alexey Kardashevskiy
a64d325df1 spapr-rtas: replace return code constants with macros
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-12-20 01:57:59 +01:00
liguang
c3931ee8b4 hw/intc: add allwinner A10 interrupt controller
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1387159292-10436-4-git-send-email-lig.fnst@cn.fujitsu.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 20:12:51 +00:00
Andreas Färber
ce31825de6 realview_gic: Prepare for QOM embedding
Move state struct, type constant and cast macro to a new header.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05 17:47:30 +01:00
Andreas Färber
612daf0628 realview_gic: Convert to QOM realize
Embed GICState and replace SysBus initfn with realizefn.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05 17:47:30 +01:00
Andreas Färber
83728796ad arm_gic: Extract headers hw/intc/arm_gic{,_common}.h
Rename NCPU to GIC_NCPU and move GICState away from gic_internal.h.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05 17:47:29 +01:00
Alexey Kardashevskiy
9554233c9b xics-kvm: enable irqfd for MSI
This enables IRQFD support for sPAPR. The feature decreases the latency
of interrupt handling.

To enable IRQFD for MSI, this sets kvm_gsi_direct_mapping to true which
enables direct MSI mapping.

To enable IRQFD for LSI (level triggered INTx interrupts), a PCI host bus
callback is required. The patch for that is coming next.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:47 +02:00
Benjamin Herrenschmidt
5d87e4b74a xics: Implement H_XIRR_X
This implements H_XIRR_X hypercall in addition to H_XIRR as
it is mandatory for PAPR+ and there is no way for the guest to
detect whether it is supported or not so just add it.

As the Partition Adjunct Option is not supported at the moment,
the CPPR parameter of the hypercall is ignored.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:47 +02:00
Benjamin Herrenschmidt
075edbe3ba xics: Implement H_IPOLL
This adds support for the H_IPOLL hypercall which the guest
uses to poll for a pending interrupt. This hypercall is
mandatory for PAPR+ and there is no way for the guest to
detect whether it is supported or not so just add it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:47 +02:00
David Gibson
11ad93f681 xics-kvm: Support for in-kernel XICS interrupt controller
Recent (host) kernels support emulating the PAPR defined "XICS" interrupt
controller system within KVM.  This patch allows qemu to initialize and
configure the in-kernel XICS, and keep its state in sync with qemu's XICS
state as necessary.

This should give considerable performance improvements.  e.g. on a simple
IPI ping-pong test between hardware threads, using qemu XICS gives us
around 5,000 irqs/second, whereas the in-kernel XICS gives us around
70,000 irqs/s on the same hardware configuration.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[Mike Qiu <qiudayu@linux.vnet.ibm.com>: fixed mistype which caused ics_set_kvm_state() to fail]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:47 +02:00
Alexey Kardashevskiy
5eb92ccc3f xics: add cpu_setup callback
This adds a cpu_setup callback to the XICS device class (as XICS-KVM
will do it different), xics_cpu_setup() will call it if it is set.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:47 +02:00
Alexey Kardashevskiy
5a3d7b23ba xics: split to xics and xics-common
The upcoming XICS-KVM support will use bits of emulated XICS code.
So this introduces new level of hierarchy - "xics-common" class. Both
emulated XICS and XICS-KVM will inherit from it and override class
callbacks when required.

The new "xics-common" class implements:
1. replaces static "nr_irqs" and "nr_servers" properties with
the dynamic ones and adds callbacks to be executed when properties
are set.
2. xics_cpu_setup() callback renamed to xics_common_cpu_setup() as
it is a common part for both XICS'es
3. xics_reset() renamed to xics_common_reset() for the same reason.

The emulated XICS changes:
1. the part of xics_realize() which creates ICPs is moved to
the "nr_servers" property callback as realize() is too late to
create/initialize devices and instance_init() is too early to create
devices as the number of child devices comes via the "nr_servers"
property.
2. added ics_initfn() which does a little part of what xics_realize() did.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:47 +02:00
Alexey Kardashevskiy
456df19cf7 xics: add missing const specifiers to TypeInfo
This adds missing const specifiers to ICS and ICP TypeInfo's.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:47 +02:00
Alexey Kardashevskiy
b45ff2d942 xics: convert init() to realize()
This fixes XICS according new QOM rules.

This converts ICS's init() callbacks to realize().

This converts legacy qdev_init_nofail() to property_set(realized).

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:47 +02:00
Alexey Kardashevskiy
d1b5682d88 xics: add pre_save/post_load dispatchers
The upcoming support of in-kernel XICS will redefine migration callbacks
for both ICS and ICP so classes and callback pointers are added.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:46 +02:00
Alexey Kardashevskiy
9ccff2a4d6 xics: replace fprintf with error_report
This replaces old-style fprintf with new style error_report.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:46 +02:00
Alexey Kardashevskiy
8ffe04ed2e xics: move reset and cpu_setup
This simple change makes following patches nicer.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-10-25 23:25:46 +02:00
Anthony Liguori
5cff81f098 QOM device refactorings
* Fix QOM and ISA documentation errors
 * Extend object_initialize() et al. to check the instance size
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Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging

QOM device refactorings

* Fix QOM and ISA documentation errors
* Extend object_initialize() et al. to check the instance size

# gpg: Signature made Fri 30 Aug 2013 02:19:48 PM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

# By Andreas Färber (14) and others
# Via Andreas Färber
* afaerber/tags/qom-devices-for-anthony:
  isa: Fix documentation of isa_register_portio_list()
  qom: Assert instance size in object_initialize_with_type()
  qom: Pass available size to object_initialize()
  qdev: Pass size to qbus_create_inplace()
  virtio-mmio: Pass size to virtio_mmio_bus_new()
  virtio-ccw: Pass size to virtio_ccw_bus_new()
  s390-virtio-bus: Pass size to virtio_s390_bus_new()
  virtio-pci: Pass size to virtio_pci_bus_new()
  usb: Pass size to usb_bus_new()
  scsi: Pass size to scsi_bus_new()
  pci: Pass size to pci_bus_new_inplace()
  ide: Pass size to ide_bus_new()
  ipack: Pass size to ipack_bus_new_inplace()
  intel-hda: Pass size to hda_codec_bus_init()
  qom: Fix object_initialize_with_type() argument name in documentation
  virtio: Remove unnecessary OBJECT() casts
  object: Fix typo in qom/object.h
2013-09-03 12:30:51 -05:00
Alexey Kardashevskiy
33a0e5d8c5 xics: move registration of global state to realize()
Registration of global state belongs into realize so move it there.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-02 10:06:42 +02:00
Andreas Färber
213f0c4f61 qom: Pass available size to object_initialize()
To be passed on to object_initialize_with_type().

Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> (virtio-ccw)
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-08-30 21:15:44 +02:00
Alex Bligh
bc72ad6754 aio / timers: Switch entire codebase to the new timer API
This is an autogenerated patch using scripts/switch-timer-api.

Switch the entire code base to using the new timer API.

Note this patch may introduce some line length issues.

Signed-off-by: Alex Bligh <alex@alex.org.uk>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-22 19:14:24 +02:00
Andreas Färber
f54d31575d ioapic: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:07:02 +02:00
Andreas Färber
cc3e064ee9 xilinx_intc: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:58 +02:00
Andreas Färber
7abad863d7 slavio_intctl: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:58 +02:00
Andreas Färber
b09a6f7b30 realview_gic: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:58 +02:00
Andreas Färber
1ecdf4022a puv3_intc: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:58 +02:00
Andreas Färber
7fc3266f76 pl190: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:58 +02:00
Andreas Färber
aefbc25695 pl190: Rename pl190_state to PL190State
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:58 +02:00
Andreas Färber
47edc5a479 omap_intc: QOM'ify omap-intc and omap2-intc
Create a new abstract base type and let omap-intc and omap2-intc inherit
from it. Introduce a type constant and use QOM casts.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:58 +02:00
Andreas Färber
1f8a9eac51 lm32_pic: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:57 +02:00
Andreas Färber
730bf9323d grlib_irqmp: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:57 +02:00
Andreas Färber
c5e22ae346 exynos4210_gic: QOM cast cleanup for exynos4210.irq_gate
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:57 +02:00
Andreas Färber
78c6abbd83 exynos4210_gic: QOM cast cleanup for exynos4210.gic
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:57 +02:00
Andreas Färber
c03c6b9cca exynos4210_combiner: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:57 +02:00
Andreas Färber
9062143f9e etraxfs_pic: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:57 +02:00
Andreas Färber
285b4432da arm_gic: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:57 +02:00
Andreas Färber
5ff94a61c4 imx_avic: QOM cast cleanup
Introduce type constant, use QOM casts and prepare SysBus initfn for QOM
realize by resolving SysBusDevice vs. DeviceState "dev" name conflict.

Acked-by: Peter Chubb <peter.chubb@nicta.com.au>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29 21:06:05 +02:00
Anthony Liguori
c04d6cfa3f xics: rename types to be sane and follow coding style
Basically, in HW the layout of the interrupt network is:

     - One ICP per processor thread (the "presenter"). This contains the
    registers to fetch a pending interrupt (ack), EOI, and control the
    processor priority.

     - One ICS per logical source of interrupts (ie, one per PCI host
    bridge, and a few others here or there). This contains the per-interrupt
    source configuration (target processor(s), priority, mask) and the
    per-interrupt internal state.

    Under PAPR, there is a single "virtual" ICS ... somewhat (it's a bit
    oddball what pHyp does here, arguably there are two but we can ignore
    that distinction). There is no register level access. A pair of firmware
    (RTAS) calls is used to configure each virtual interrupt.

    So our model here is somewhat the same. We have one ICS in the emulated
    XICS which arguably *is* the emulated XICS, there's no point making it a
    separate "device", that would just be gross, and each VCPU has an
    associated ICP.

Yet we call the "XICS" struct icp_state and then the ICPs
'struct icp_server_state'.  It's particularly confusing when all of the
functions have xics_prefixes yet take *icp arguments.

Rename:

  struct icp_state -> XICSState
  struct icp_server_state -> ICPState
  struct ics_state -> ICSState
  struct ics_irq_state -> ICSIRQState

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Message-id: 1374175984-8930-12-git-send-email-aliguori@us.ibm.com
[aik: added ics_resend() on post_load]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29 10:37:09 -05:00
Hu Tao
f5ba752371 ioapic: Use QOM realize for ioapic
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
[AF: Tweaked error message]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23 00:37:35 +02:00
Alexey Kardashevskiy
42e5b4c988 pseries: move interrupt controllers to hw/intc/
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-11 18:51:23 +02:00
Andreas Färber
2b927571cc intc/openpic: Build openpic only once
Since current_cpu is CPUState it no longer depends on CPUPPCState.

Move ppce500_set_mpic_proxy() to a new hw/ppc/ppc_e500.h because
hw/ppc/ppc.h is too heavily using CPUPPCState and PowerPCCPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09 21:33:02 +02:00
Andreas Färber
dfc080791d intc/arm_gic: Build arm_gic only once
Since current_cpu is CPUState it no longer needs CPUArchState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09 21:33:02 +02:00
Andreas Färber
182735efaf cpu: Make first_cpu and next_cpu CPUState
Move next_cpu from CPU_COMMON to CPUState.
Move first_cpu variable to qom/cpu.h.

gdbstub needs to use CPUState::env_ptr for now.
cpu_copy() no longer needs to save and restore cpu_next.

Acked-by: Paolo Bonzini <pbonzini@redhat.com>
[AF: Rebased, simplified cpu_copy()]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09 21:32:54 +02:00
Andreas Färber
4917cf4432 cpu: Replace cpu_single_env with CPUState current_cpu
Move it to qom/cpu.h.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09 21:20:28 +02:00
Paolo Bonzini
1437c94b26 hw/i*: pass owner to memory_region_init* functions
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04 17:42:48 +02:00
Paolo Bonzini
2c9b15cab1 memory: add owner argument to initialization functions
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04 17:42:44 +02:00
Andreas Färber
dd49c038c3 intc/openpic_kvm: Fix QOM and build issues
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01 01:11:15 +02:00
Andreas Färber
cbe72019b1 intc/openpic: Convert to QOM realize
Split qdev initfn into instance_init and realize functions.
Change one occurrence of "klass" while at it.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01 01:11:15 +02:00
Andreas Färber
e1766344fd intc/openpic: QOM'ify
Introduce type constant and cast macro.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01 01:11:14 +02:00
Scott Wood
d85937e683 kvm/openpic: in-kernel mpic support
Enables support for the in-kernel MPIC that thas been merged into the
KVM next branch.  This includes irqfd/KVM_IRQ_LINE support from Alex
Graf (along with some other improvements).

Note from Alex regarding kvm_irqchip_create():

  On x86, one would call kvm_irqchip_create() to initialize an
  in-kernel interrupt controller.  That function then goes ahead and
  initializes global capability variables as well as the default irq
  routing table.

  On ppc, we can't call kvm_irqchip_create() because we can have
  different types of interrupt controllers.  So we want to do all the
  things that function would do for us in the in-kernel device init
  handler.

Signed-off-by: Scott Wood <scottwood@freescale.com>
[agraf: squash in kvm_irqchip_commit_routes patch, fix non-kvm build,
        fix ppcemb]
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01 01:11:14 +02:00
Scott Wood
8935a442cd openpic: factor out some common defines into openpic.h
...for use by the KVM in-kernel irqchip stub.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01 01:11:14 +02:00
Peter Crosthwaite
afd59989db intc/xilinx_intc: Dont lower IRQ when HIE cleared
This is a little strange. It is lowering the parent IRQ pin on input
when HIE is cleared. There is no such behaviour in the real hardware.

ISR changes based on interrupt pin state are already guarded on HIE
being set. So we can just delete this if in its entirety.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:45:00 +02:00
Peter Crosthwaite
fa96d6142f intc/xilinx_intc: Inhibit write to ISR when HIE
When the Hardware Interrupt Enable (HIE) bit is set, software cannot
change ISR. Add write guard accordingly.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:45:00 +02:00
Peter Crosthwaite
45fdd3bf5a intc/xilinx_intc: Handle level interrupt retriggering
Acking a level sensitive interrupt should have no effect if the
interrupt pin is still asserted. The current implementation requires
and edge condition to occur for setting a level sensitive IRQ, which
means an ACK can clear a level sensitive interrupt, until the original
source strobes the interrupt again.

Fix by keeping track of the interrupt pin state and setting ISR based
on this every time update_irq() is called.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:45:00 +02:00
Peter Crosthwaite
6327c221ff intc/xilinx_intc: Don't clear level sens. IRQs without ACK
For level sensitive interrupts, ISR bits are cleared when the input pin
is lowered. This is incorrect. Only software can clear ISR bits (via
IAR or direct write to ISR with !MER(2)).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18 09:44:59 +02:00
Blue Swirl
371a775dc1 Merge branch 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu
* 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu:
  qdev: Drop FROM_QBUS() macro
  isa: QOM'ify ISADevice
  isa: QOM'ify ISABus
  i8259: Convert PICCommonState to use QOM realizefn
  kvm/i8259: QOM'ify some more
  i8259: QOM'ify some more
  i8254: Convert PITCommonState to QOM realizefn
  kvm/i8254: QOM'ify some more
  i8254: QOM'ify some more
  isa: Use realizefn for ISADevice
  cs4231a: QOM'ify some more
  gus: QOM'ify some more
2013-06-15 10:53:44 +00:00
Peter Crosthwaite
5c9f43363a intc/xilinx_intc: Use qemu_set_irq
Use qemu_set_irq rather than if-elsing qemu_irq_(lower|raise). No
functional change, just reduces verbosity.

Cc: qemu-trivial@nongnu.org

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-06-11 23:45:43 +04:00
Andreas Färber
4a17cc4f28 isa: QOM'ify ISADevice
Rename its parent field and use DEVICE() where necessary.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-07 14:55:33 +02:00
Andreas Färber
d2628b7d18 i8259: Convert PICCommonState to use QOM realizefn
Instead of having the parent provide PICCommonClass::init,
let the children override DeviceClass::realize themselves.
This pushes the responsibility of saving and calling the parent's
realizefn to the children.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-07 14:55:24 +02:00
Andreas Färber
d1eebf4e3d i8259: QOM'ify some more
Introduce type constant.

Prepares for PIC realizefn.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-07 14:55:24 +02:00
Andreas Färber
db895a1e6a isa: Use realizefn for ISADevice
Drop ISADeviceClass::init and the resulting no-op initfn and let
children implement their own realizefn. Adapt error handling.
Split off an instance_init where sensible.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-07 12:14:45 +02:00
Michael S. Tsirkin
edf9735e40 apic: rename apic specific bitopts
apic has its own version of bitops, with the
difference that it works on u32 and not long.
Add apic_ prefix to avoid namespace clashes.

We should look into reusing standard bitops long-term,
but that's not entirely trivial.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-06-02 18:14:02 +03:00
Blue Swirl
6a4e177114 Remove Sun4c, Sun4d and a few CPUs
Sun4c and Sun4d architectures and related CPUs are not fully implemented
(especially Sun4c MMU) and there has been no interest for them.

Likewise, a few CPUs (Cypress, Ross etc) are only half implemented.

Remove the machines and CPUs, they can be re-added if needed later.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-05-26 11:37:58 +00:00
Dong Xu Wang
c7e775e4dd remove double semicolons
Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-05-12 13:25:55 +04:00
Igor Mammedov
53a89e262b target-i386: Move APIC to ICC bus
It allows APIC to be hotplugged.

 * map APIC's mmio at board level if it is present
 * do not register mmio region for each APIC, since
   only one is used/mapped

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01 13:06:07 +02:00
Igor Mammedov
baaeda08ff target-i386: Replace MSI_SPACE_SIZE with APIC_SPACE_SIZE
Put APIC_SPACE_SIZE in a public header so that it can be
reused elsewhere later.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01 13:04:19 +02:00
Andreas Färber
29bb5317cb i8259: QOM cleanups
Eliminate DO_UPCAST() for PICCommonState. Prepares for ISA realizefn.

Also give the i8259_common type registration functions unique names
while at it.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Message-id: 1367093935-29091-6-git-send-email-afaerber@suse.de
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-29 08:27:47 -05:00
Igor Mammedov
f16a69f7fc ioapic: Replace FROM_SYSBUS() with QOM type cast
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16 01:19:46 +02:00
Peter Maydell
bd2be15003 arm: fix location of some include files
The recent rearrangement of include files had some minor errors:
 devices.h is not ARM specific and should not be in arm/
 arm.h should be in arm/

Move these two headers to correct this.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15 15:16:01 +02:00
Peter Maydell
e03ba13637 Typo, spelling and grammatical fixes
Minor fixes to documentation and code comments.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-04-12 14:33:20 +02:00
Paolo Bonzini
47b43a1f41 hw: move private headers to hw/ subdirectories.
Many headers are used only in a single directory.  These can be
kept in hw/.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:16 +02:00
Paolo Bonzini
7702e47c21 hw: move interrupt controllers to hw/intc/, configure with default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:16 +02:00
Paolo Bonzini
49ab747f66 hw: move target-independent files to subdirectories
This patch tackles all files that are compiled once, moving
them to subdirectories of hw/.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:12 +02:00
Paolo Bonzini
1fd6bb44ed hw: make subdirectories for devices
Prepare the new directory structure.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:11 +02:00