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2 Commits

Author SHA1 Message Date
Peter Maydell
256d3e21f2 hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ 
Connect the VIRQ and VFIQ lines from the GIC to the CPU;
these exist always for both CPU and GIC whether the
virtualization extensions are enabled or not, so we
can just unconditionally connect them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180821132811.17675-6-peter.maydell@linaro.org
 2018-08-24 13:17:33 +01:00
Jean-Christophe Dubois
31cbf933f0 i.MX6UL: Add i.MX6UL SOC 
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: 3853ec555d68e7e25d726170833b775796151a07.1532984236.git.jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-08-16 14:05:28 +01:00