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30 Commits

Author SHA1 Message Date
bellard
57fec1fee9 use the TCG code generator 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-01 10:50:11 +00:00
bellard
d656469f44 use simpler REGPARM convention - make CPUTLBEntry size a power of two 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3935 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-31 09:22:27 +00:00
ths
01ba98161f Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-09 02:22:57 +00:00
pbrook
87ecb68bdf Break up vl.h. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 17:14:51 +00:00
ths
623a930ec3 Implement missing MIPS supervisor mode bits. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 19:45:05 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
j_mayer
71c8b8fd7b TARGET_FMT_lu may also be useful. 
Fix compilation warnings.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3190 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-19 05:46:03 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
balrog
d79acba420 Fix writes to pages containing watchpoints for the RAM not at 0x0 cases. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3025 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-26 20:01:13 +00:00
j_mayer
ba13c4327e Add TARGET_FMT_plx to properly display target_phys_addr_t variables. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2660 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-14 12:15:36 +00:00
j_mayer
6fa4cea9e8 Infrastructure to support more than 2 MMU modes. 
Add example for Alpha and PowerPC hypervisor mode.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2596 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 06:43:27 +00:00
j_mayer
b62b461bd3 TARGET_FMT_ld may also be useful for debugging purposes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2593 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-04 07:58:14 +00:00
pbrook
6658ffb81e Watchpoint support (previous commit got eaten by Savannah server crash). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2479 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-16 23:58:11 +00:00
pbrook
b362e5e067 Speed up tlb_flush_page (Daniel Jacobowitz). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2210 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-11-12 20:40:55 +00:00
bellard
26a76461f2 C99 64 bit printf 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-25 18:15:32 +00:00
bellard
84b7b8e778 PAGE_EXEC support in TLBs 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1676 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-28 21:19:04 +00:00
bellard
5a1e3cfcb0 better halted state support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1652 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-23 21:02:53 +00:00
bellard
6a00d60127 SMP support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1640 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-21 23:25:50 +00:00
bellard
a316d3353c added CPU_COMMON and CPUState.tb_jmp_cache[] 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-20 10:32:34 +00:00
bellard
ff7b8f5b0f ram_addr_t type for ram offsets 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1542 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-08-21 09:24:05 +00:00
bellard
2be0071f22 simplified PowerPC exception handling (Jocelyn Mayer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1492 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 22:09:27 +00:00
bellard
b685369795 added HOST_LONG_BITS in configure 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1457 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-06-05 17:10:39 +00:00
bellard
c27004ec78 64 bit target support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1189 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-01-03 23:35:10 +00:00
bellard
4f2ac23784 amd64 port (Jocelyn Mayer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@762 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-04-26 19:44:02 +00:00
bellard
ab6d960ffa added target_phys_addr_t 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@756 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-04-25 21:25:15 +00:00
bellard
f193c7979c do not depend on thunk.h - more log items 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@675 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-03-21 17:06:25 +00:00
bellard
ed1c0bcb0c use osdep.h 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@626 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-02-16 22:17:43 +00:00
bellard
35b66fc4f9 correct target_ulong definition 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@582 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-01-24 15:26:06 +00:00
bellard
db8d746688 comments 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@405 c046a42c-6fe2-441c-8c8c-71466251a162
 2003-10-27 21:12:17 +00:00
bellard
ab93bbe2ae soft mmu support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@349 c046a42c-6fe2-441c-8c8c-71466251a162
 2003-08-10 21:35:13 +00:00