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54 Commits

Author SHA1 Message Date
pbrook
b2fa17977f Fix ARMv6 translation table base address calculation. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5514 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-22 19:22:30 +00:00
pbrook
4be27dbbde Optimize redundant cp15 coprocessor access control register writes. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5512 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-22 16:14:08 +00:00
pbrook
56aebc8916 Add GDB XML register description support. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5459 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-11 17:55:29 +00:00
balrog
a87aa10b85 ARMv6: fix SIMD add/sub carry flags (Vincent Palatin). 
After a quick code review, it seems to be a bad cut-n-paste between
16-bit and 8-bit UADD/USUB, indeed UADD8/USUB8 tries to set GE bits by
pair instead of one at a time.
Besides, the addition operations (UADD8/UADD16) set GE bits to "NOT
carry" instead of "carry" (probably once again due to a copy of the
substraction code which sets flags to "NOT borrow")


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4900 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-19 10:46:13 +00:00
balrog
22478e79f2 Fix smlald, smlsld, pkhtp, pkhbt, ssat, usat, umul, smul... (Laurent Desnogues). 
helper.c
 - copy reference c0_c2 to runtime c0_c2 and not c0_c1

op_helper.c
 - remove old code (PARAM1, probably some left over from old dyngen)
   that broke do_[us]sat

translate.c
 - gen_smul_dual should sign-extend from 16 bit to 32 bit and not from
   8 to 32
 - disas_arm_insn:
   * smlalxy:  that was completely wrong;  now the addition is
     performed as for smlald
   * pkhtb:  optional ASR not taken into account (similar
   * to [us]sat)
   * pkhtb/pkhbt: tmp2 is dead
   * smlald, smlsld, smuad, smusd, smlad, smlsd: rd
   * and rn swapped


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4898 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-19 10:12:22 +00:00
pbrook
ab19b0ecfd ARMv7-M interrupt stack alignment fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4823 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-02 16:44:09 +00:00
pbrook
460a09c1fb Fix incorrect argument types. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4291 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-01 12:04:35 +00:00
balrog
601d70b9e5 Remove an unused field and fix some non-code typos. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4222 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-20 01:03:45 +00:00
balrog
66230e0dee Correct more ARM VFP 32/64 and signed/unsigned typos. 
Fixes unreadable fonts in Maemo guest.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4221 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-20 00:58:01 +00:00
balrog
827df9f3c5 Add basic OMAP2 chip support. 
Add the OMAP242x (arm1136 core) initialisation with basic on-chip
peripherals and update OMAP1 peripherals which are re-used in OMAP2.
Make palmte.c and sd.c errors go to stderr.
Allow disabling SD chipselect.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4213 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-14 21:05:22 +00:00
balrog
6c95676b16 Store the right TCG temp (typo). 
Stops ARMv6 target from segfaulting early.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4201 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-13 00:57:49 +00:00
aurel32
ca10f86763 Remove osdep.c/qemu-img code duplication 
(Kevin Wolf)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-11 21:35:42 +00:00
aurel32
1654b2d6bf Fix few spelling issues in comments 
(Stefan Weil)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4187 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-11 04:55:07 +00:00
pbrook
6fbe23d50e ARM N=Z=1 flag fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4156 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-01 17:19:11 +00:00
pbrook
ad69471ce5 ARM TCG conversion 14/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4151 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:48:30 +00:00
pbrook
8f8e3aa451 ARM TCG conversion 13/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4150 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:48:01 +00:00
pbrook
8984bd2e83 ARM TCG conversion 12/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4149 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:47:48 +00:00
pbrook
5e3f878ad6 ARM TCG conversion 11/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4148 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:47:34 +00:00
pbrook
4373f3ceeb ARM TCG conversion 10/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4147 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:47:19 +00:00
pbrook
b010980544 ARM TCG conversion 9/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:47:03 +00:00
pbrook
6ddbc6e4cf ARM TCG conversion 7/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4144 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:46:33 +00:00
pbrook
3670669ce2 ARM TCG conversion 6/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4143 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:46:19 +00:00
pbrook
1497c961af ARM TCG conversion 4/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4141 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:45:50 +00:00
pbrook
f51bbbfefe ARM TCG conversion 2/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4139 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:45:13 +00:00
pbrook
b26eefb68e ARM TCG conversion 1/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4138 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:44:26 +00:00
ths
01ba98161f Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-09 02:22:57 +00:00
pbrook
2ad207d4a0 Thumb semihosting fixes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3729 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-24 23:22:11 +00:00
balrog
2f4a40e569 Prevent cpsr_write/_read be put out of line in op.o (fixes a segfault on some platforms). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3633 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-13 01:50:15 +00:00
pbrook
9ee6e8bb85 ARMv7 support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-11 00:04:49 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
balrog
405ee3ad57 Invalidate TLBs when domains are changed (Matthew Warton). 
Legalise cp15 pid register writes (Matthew Warton).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3494 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-31 00:47:13 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
j_mayer
c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
balrog
2e23213f26 Special-case iWMMXt register transfer insns, which are in ARM LDC2/STC2 class. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3107 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-01 02:31:54 +00:00
balrog
330c4d61a6 Fix XScale MMU's extended small pages. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3093 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-29 22:21:45 +00:00
balrog
c3d2689d88 Basic OMAP310 support. Basic Palm Tungsten|E machine emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3091 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-29 17:57:26 +00:00
balrog
610c3c8afd Reset ARM cp15.c1_sys to default values. Fix XScale cp15 accesses. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3013 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-24 12:09:48 +00:00
pbrook
ce8198612e ARM946 CPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2783 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-08 02:30:40 +00:00
balrog
18c9b56060 Implement iwMMXt instruction set for the PXA270 cpu. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2752 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-30 02:02:17 +00:00
balrog
c1713132e0 Core features of ARM XScale processors. Main PXA270 and PXA255 peripherals. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2749 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-30 01:26:42 +00:00
pbrook
c73c3aa081 Fix ARM fine pagetables. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2742 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-29 19:06:34 +00:00
j_mayer
9b3c35e0e6 cpu_get_phys_page_debug should return target_phys_addr_t 
instead of target_ulong to be consistent.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 11:21:28 +00:00
pbrook
f3d6b95e83 ARM reabbot support (orginal patch by Aurelien Jarno). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2476 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-11 13:03:18 +00:00
pbrook
5adb4839e3 Fix typo in help output. 
List ARM cpus.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2475 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-08 03:15:18 +00:00
pbrook
3371d27293 Implement --cpu for ARM. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2474 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-08 03:04:12 +00:00
pbrook
8e71621f78 Add ARM Angel semihosting to system emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2340 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-20 17:12:09 +00:00
pbrook
78600320a8 Arm MMU fix (Justin Fletcher). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2154 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-09-09 14:36:26 +00:00
pbrook
d07edbfa00 Fix Arm cp15 c13 (Process ID) register writes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2067 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-07-21 22:39:57 +00:00
pbrook
8637c67fc5 Fix FIQ bank switching. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1786 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-03-14 14:20:32 +00:00