Commit Graph

98260 Commits

Author SHA1 Message Date
Víctor Colombo
4b65b6e769 target/ppc: Zero second doubleword of VSR registers for FPR insns
FPR register are mapped to the first doubleword of the VSR registers.
Since PowerISA v3.1, the second doubleword of the target register
must be zeroed for FP instructions.

This patch does it by writting 0 to the second dw everytime the
first dw is being written using set_fpr.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-8-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
af721a3169 target/ppc: Set OV32 when OV is set
According to PowerISA: "OV32 is set whenever OV is implicitly set, and
is set to the same value that OV is defined to be set to in 32-bit
mode".

This patch changes helper_update_ov_legacy to set/clear ov32 when
applicable.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-7-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
9f097daa54 target/ppc: Zero second doubleword for VSX madd instructions
In 205eb5a89e we updated most VSX instructions to zero the
second doubleword, as is requested by PowerISA since v3.1.
However, VSX_MADD helper was left behind unchanged, while it
is also affected and should be fixed as well.

This patch applies the fix for MADD instructions.

Fixes: 205eb5a89e ("target/ppc: Change VSX instructions behavior to fill with zeros")
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-6-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
3ecec4c042 target/ppc: Set result to QNaN for DENBCD when VXCVI occurs
According to the ISA, for instruction DENBCD:
"If an invalid BCD digit or sign code is detected in the source
operand, an invalid-operation exception (VXCVI) occurs."

In the Invalid Operation Exception section, there is the situation:
"When Invalid Operation Exception is disabled (VE=0) and Invalid
Operation occurs (...) If the operation is an (...) or format the
target FPR is set to a Quiet NaN". This was not being done in
QEMU.

This patch sets the result to QNaN when the instruction DENBCD causes
an Invalid Operation Exception.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-5-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
34f760bac2 target/ppc: Zero second doubleword in DFP instructions
Starting at PowerISA v3.1, the second doubleword of the registers
used to store results in DFP instructions are supposed to be zeroed.

From the ISA, chapter 7.2.1.1 Floating-Point Registers:
"""
Chapter 4. Floating-Point Facility provides 32 64-bit
FPRs. Chapter 5. Decimal Floating-Point also employs
FPRs in decimal floating-point (DFP) operations. When
VSX is implemented, the 32 FPRs are mapped to
doubleword 0 of VSRs 0-31. (...)
All instructions that operate on an FPR are redefined
to operate on doubleword element 0 of the
corresponding VSR. (...)
and the contents of doubleword element 1 of the
VSR corresponding to the target FPR or FPR pair for these
instructions are set to 0.
"""

Before, the result stored at doubleword 1 was said to be undefined.

With that, this patch changes the DFP facility to zero doubleword 1
when using set_dfp64 and set_dfp128. This fixes the behavior for ISA
3.1 while keeping the behavior correct for previous ones.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
228ab1451d target/ppc: Remove unused xer_* macros
The macros xer_ov, xer_ca, xer_ov32, and xer_ca32 are both unused and
hiding the usage of env. Remove them.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-3-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
676696f428 target/ppc: Remove extra space from s128 field in ppc_vsr_t
Very trivial rogue space removal. There are two spaces between Int128
and s128 in ppc_vsr_t struct, where it should be only one.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
74177ec661 target/ppc: Merge fsqrt and fsqrts helpers
These two helpers are almost identical, differing only by the softfloat
operation it calls. Merge them into one using a macro.
Also, take this opportunity to capitalize the helper name as we moved
the instruction to decodetree in a previous patch.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220905123746.54659-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
4896c15bc3 target/ppc: Move fsqrts to decodetree
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220905123746.54659-3-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
6a8654d6c2 target/ppc: Move fsqrt to decodetree
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220905123746.54659-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
53ae2aeb94 target/ppc: Implement hashstp and hashchkp
Implementation for instructions hashstp and hashchkp, the privileged
versions of hashst and hashchk, which were added in Power ISA 3.1B.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Message-Id: <20220715205439.161110-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
670f1da374 target/ppc: Implement hashst and hashchk
Implementation for instructions hashst and hashchk, which were added
in Power ISA 3.1B.

It was decided to implement the hash algorithm from ground up in this
patch exactly as described in Power ISA.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Message-Id: <20220715205439.161110-3-victor.colombo@eldorado.org.br>
[danielhb: fix block comment in excp_helper.c]
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Víctor Colombo
903f84eb88 target/ppc: Add HASHKEYR and HASHPKEYR SPRs
Add the Special Purpose Registers HASHKEYR and HASHPKEYR, which were
introduced by the Power ISA 3.1B. They are used by the new instructions
hashchk(p) and hashst(p).

The ISA states that the Operating System should generate the value for
these registers when creating a process, so it's its responsability to
do so. We initialize it with 0 for qemu-softmmu, and set a random 64
bits value for linux-user.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Message-Id: <20220715205439.161110-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20 10:54:06 -03:00
Thomas Huth
0e4ef702e8 qga: Replace 'blacklist' and 'whitelist' in the guest agent sources
Let's use better, more inclusive wording here.

Message-Id: <20220727092135.302915-3-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:37:00 +02:00
Thomas Huth
582a098e6c qga: Replace 'blacklist' command line and config file options by 'block-rpcs'
Let's use a more appropriate wording for this command line and config
file option. The old ones are still accepted for compatibility reasons,
but marked as deprecated now so that it could be removed in a future
version of QEMU.

This change is based on earlier patches from Philippe Mathieu-Daudé,
with the idea for the new option name suggested by BALATON Zoltan.

And while we're at it, replace the "?" in the help text with "help"
since that does not have the problem of conflicting with the wildcard
character of the shells.

Message-Id: <20220727092135.302915-2-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:37:00 +02:00
Thomas Huth
7eab180f90 gitlab-ci: Update the FreeBSD 13 job from 13.0 to 13.1
The FreeBSD 13 job in our CI started failing since the python port
stopped working after 13.1 has been released. Thus update our CI
job to FreeBSD 13.1 to get it working again.

Suggested-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220920102041.45067-1-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:36:12 +02:00
Juan Quintela
1dbea81852 tests: sb16 has both pc and q35 tests
Check that the machines are compiled in before calling it

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-6-quintela@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:34:31 +02:00
Juan Quintela
08ed0988d6 tests: Only run intel-hda-tests if machine type is compiled in
Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-5-quintela@redhat.com>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:34:31 +02:00
Juan Quintela
34b1f2c620 bios-tables-test: Only run test for machine types compiled in
Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-4-quintela@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:34:31 +02:00
Juan Quintela
d007981ae1 bios-tables-test: Sort all x86_64 tests by machine type
No code change here, just move test around.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-3-quintela@redhat.com>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:34:31 +02:00
Juan Quintela
b3ad62c14f bios-tables-test: Make oem-fields tests be consistent
Every other test function is named:

	test_acpi_<machine>_<test>()

Just make this test the same.  Once there, rename "acpi/oem-fields" to
"acpi/piix4/oem-fields" so it is consistent with everything else.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-2-quintela@redhat.com>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:34:31 +02:00
Juan Quintela
abad185c6b meson-build: Enable CONFIG_REPLICATION only when replication is set
Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902165126.1482-8-quintela@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 12:34:31 +02:00
Juan Quintela
a65c9527fd tests: Fix error strings
They were copy-pasted from e1000e and never changed.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902165126.1482-7-quintela@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20 11:23:02 +02:00
Xiaojuan Yang
1895b96792
hw/loongarch: Improve acpi dsdt table
Cleanup the previous pci information in acpi dsdt table.
And using the common acpi_dsdt_add_gpex function to build
the gpex and pci information.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-10-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20 15:44:25 +08:00
Xiaojuan Yang
c3da26f314
hw/loongarch: Support memory hotplug
Add hotplug/unplug interface for memory device.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-9-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20 15:44:25 +08:00
Xiaojuan Yang
1cd5db2e88
hw/loongarch: Fix acpi ged irq number in dsdt table
In dsdt, acpi ged irq should use gsi number, and the
VIRT_SCI_IRQ means it.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-8-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20 15:44:25 +08:00
Xiaojuan Yang
f8ab9aa288
hw/loongarch: Add RAMFB to dynamic_sysbus_devices list
Add RAMFB device to dynamic_sysbus_devices list so that it can be
hotpluged to the machine.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-7-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20 15:44:25 +08:00
Xiaojuan Yang
e27e535768
hw/loongarch: Add hotplug handler for machine
Add hotplug handler for LoongArch virt machine and now only support
the dynamic sysbus device.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-6-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20 15:44:24 +08:00
Xiaojuan Yang
a1f7d78e56
hw/loongarch: Add platform bus support
Add platform bus support and add the bus information such as address,
size, irq number to FDT table.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-5-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20 15:44:24 +08:00
Xiaojuan Yang
ee413a52c1
hw/loongarch: Add interrupt information to FDT table
Add interrupt information to FDT table, such as interrupt
controller info, compatiable info, etc.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-4-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-20 15:44:05 +08:00
Matheus Tavares Bernardino
8888ee42af Hexagon (tests/tcg/hexagon): add fmin/fmax tests for signed zero
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Tested-by: Taylor Simpson <tsimpson@quicinc.com>
2022-09-19 11:55:23 -07:00
Taylor Simpson
caa0a12e01 Hexagon (target/hexagon) remove unused encodings
Remove encodings guarded by ifdef that is not defined

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220606222327.7682-4-tsimpson@quicinc.com>
2022-09-19 11:44:20 -07:00
Paolo Bonzini
df22fbb751 qboot: update to latest submodule
Include patch "Place setup_data at location specified by host"
from Jason A. Donenfeld.

Cc: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:40:51 +02:00
Paolo Bonzini
9ee37d3bb8 build: remove extra parentheses causing missing rebuilds
Because of two stray parentheses at the end of the definition of
ninja-cmd-goals, the test that is last in the .check-TESTSUITENAME.deps
variable will not be rebuilt.  Fix that.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:16:00 +02:00
Paolo Bonzini
efcca7ef17 target/i386: introduce insn_get_addr
The "O" operand type in the Intel SDM needs to load an 8- to 64-bit
unsigned value, while insn_get is limited to 32 bits.  Extract the code
out of disas_insn and into a separate function.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:16:00 +02:00
Paolo Bonzini
5c2f60bd1b target/i386: REPZ and REPNZ are mutually exclusive
The later prefix wins if both are present, make it show in s->prefix too.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:16:00 +02:00
Paolo Bonzini
ca4b1b43bc target/i386: fix INSERTQ implementation
INSERTQ is defined to not modify any bits in the lower 64 bits of the
destination, other than the ones being replaced with bits from the
source operand.  QEMU instead is using unshifted bits from the source
for those bits.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:16:00 +02:00
Paolo Bonzini
034668c329 target/i386: correctly mask SSE4a bit indices in register operands
SSE4a instructions EXTRQ and INSERTQ have two bit index operands, that can be
immediates or taken from an XMM register.  In both cases, the fields are
6-bit wide and the top two bits in the byte are ignored.  translate.c is
doing that correctly for the immediate case, but not for the XMM case, so
fix it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:16:00 +02:00
Claudio Fontana
5e03b6daf6 audio: add help option for -audio and -audiodev
add a simple help option for -audio and -audiodev
to show the list of available drivers, and document them.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20220908081441.7111-1-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:15:59 +02:00
Paolo Bonzini
e121d7606b tests/tcg: remove old SSE tests
The new testsuite is much more comprehensive, so remove the old one;
it is also buggy (the pinsrw test uses incorrect constraints, with =
instead of +, and the golden output for the fxsave tests differs depending
on how the C library uses SSE and AVX instructions).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:15:59 +02:00
Paolo Bonzini
e02907cc12 tests/tcg: refine MMX support in SSE tests
Extend the support to memory operands, and skip MMX instructions that
were introduced in SSE times, because they are now covered in test-mmx.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:15:59 +02:00
Paolo Bonzini
fa7ce0b028 tests/tcg: i386: add MMX and 3DNow! tests
Adjust the test-avx.py generator to produce tests specifically for
MMX and 3DNow.  Using a separate generator introduces some code
duplication, but is a simpler approach because of test-avx's extra
complexity to support 3- and 4-operand AVX instructions.

If needed, a common library can be introduced later.

While at it, for consistency move all the -cpu max rules to the
same place.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:14:40 +02:00
Mauro Matteo Cascella
a772ddc1c0 qtest/fuzz-lsi53c895a-test: set guest RAM to 2G
test_lsi_do_msgout_cancel_req does not run on machines with small size
memory. Reduce guest memory from 4G to 2G to alleviate the problem.

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Mauro Matteo Cascella <mcascell@redhat.com>
Message-Id: <20220902133853.834065-1-mcascell@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-19 15:12:28 +02:00
Patrick Venture
d1592cbe07 tests/qtest: npcm7xx-emc-test: Skip checking MAC
The register tests walks all the registers to verify they are initially
0 when appropriate.  However, if the MAC address is set in the register
space, this should not be checked against 0.

Reviewed-by: Hao Wu <wuhaotsh@google.com>
Signed-off-by: Patrick Venture <venture@google.com>
Message-Id: <20220906163138.2831353-1-venture@google.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-19 15:12:28 +02:00
Bin Meng
039fb54906 .gitlab-ci.d/windows.yml: Drop the sed processing in the 64-bit build
The sed processing of build/config-host.mak seems to be no longer
needed, and there is no such in the 32-bit build too. Drop it.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20220908132817.1831008-5-bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-19 15:12:28 +02:00
Brad Smith
5bf0602522 tests/vm: update NetBSD to 9.3
Update NetBSD to 9.3

Signed-off-by: Brad Smith <brad@comstyle.com>
Message-Id: <YxacoSbT1cZR4SKr@humpty.home.comstyle.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-19 15:12:28 +02:00
Marc-André Lureau
525207cd77 tests: mark io-command test as skipped if socat is missing
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220901110414.2892954-1-marcandre.lureau@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-19 15:12:28 +02:00
Xiaojuan Yang
feae45dc42
hw/loongarch: Support fw_cfg dma function
Support fw_cfg dma function for LoongArch virt machine.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-3-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-19 20:01:40 +08:00
Xiaojuan Yang
3ff17902c4
hw/loongarch: Remove vga device when loongarch init
Remove the vga device when loongarch machine init and
we will support other display device in the future.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-2-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-09-19 20:01:36 +08:00
Paolo Bonzini
4ce4a1a714 tests/tcg: i386: fix typos in 3DNow! instructions
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-18 09:17:41 +02:00