Determine legal VLIW slots for each instruction
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1612763186-18161-26-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Imported from the Hexagon architecture library
imported/macros.def
The macro definitions specify instruction attributes that are applied
to each instruction that references the macro. The generator will
recursively apply attributes to each instruction that used the macro.
imported/allidefs.def
Top level instruction definition file
imported/*.idef
Instruction definition files
These files are input to the first phase of the generator
(gen_semantics.c) to create a python include file with the
instruction semantics and attributes. The python include
file is fed to the second phase to generate various header files.
imported/encode*.def
Instruction encoding bit patterns for every instruction
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1612763186-18161-19-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
