4 Commits

Author	SHA1	Message	Date
Ian Jiang	354908cee1	riscv: Add helper to make NaN-boxing for FP register ... The function that makes NaN-boxing when a 32-bit value is assigned to a 64-bit FP register is split out to a helper gen_nanbox_fpr(). Then it is applied in translating of the FLW instruction. Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com> Message-Id: <20200128003707.17028-1-ianjiang.ict@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>	2020-06-19 08:24:07 -07:00
ShihPo Hung	a59796eb6d	target/riscv: fsd/fsw doesn't dirty FP state ... Signed-off-by: ShihPo Hung <shihpo.hung@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>	2020-01-16 10:03:08 -08:00
Bastian Koppelmann	95561ee3b4	target/riscv: Convert RV64F insns to decodetree ... Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>	2019-03-13 10:34:06 +01:00
Bastian Koppelmann	6f0e74ff4b	target/riscv: Convert RV32F insns to decodetree ... Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>	2019-03-13 10:34:06 +01:00