Commit Graph

102731 Commits

Author SHA1 Message Date
Marc-André Lureau
eb9062d4cf ui/dbus: set mouse is-absolute during console creation
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-03-13 22:57:39 +04:00
Marc-André Lureau
e74fec9aa4 audio/dbus: there are no sender for p2p mode
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2023-03-13 22:57:39 +04:00
Marc-André Lureau
b289bb301a ui/dbus: unregister clipboard on connection close
Fixes unregistration with p2p connections, since they don't have an
associated name owner.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2023-03-13 22:57:39 +04:00
Marc-André Lureau
8bb6af6792 ui/dbus: initialize cursor_fb
Or else, we may randomly destroy some textures..

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-03-13 22:57:39 +04:00
John Snow
a234ec311b qemu-options.hx: remove stray quote
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230202223121.252073-1-jsnow@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-03-13 18:36:38 +01:00
Peter Maydell
5cfda4ce79 * One more fix for the migration qtest
* Remove the edk2 gitlab-CI job
 * Improve the build-system-alpine CI job
 * Fix emulation of the CHRL/CGHRL s390x instructions
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Merge tag 'pull-request-2023-03-13' of https://gitlab.com/thuth/qemu into staging

* One more fix for the migration qtest
* Remove the edk2 gitlab-CI job
* Improve the build-system-alpine CI job
* Fix emulation of the CHRL/CGHRL s390x instructions

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# gpg: Signature made Mon 13 Mar 2023 14:08:40 GMT
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# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
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* tag 'pull-request-2023-03-13' of https://gitlab.com/thuth/qemu:
  tests/tcg/s390x: Add C(G)HRL test
  target/s390x: Fix emulation of C(G)HRL
  gitlab-ci.d/buildtest: Rework the target list of build-system-alpine
  gitlab-ci: Remove job building EDK2 firmware binaries
  tests/migration: Tweek auto converge limits check

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-13 17:09:33 +00:00
Richard Henderson
0c8b6b9a63 tcg: Drop tcg_const_*
These functions are no longer used.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
f6ff9c2f8e tcg: Drop tcg_const_*_vec
Replace with tcg_constant_vec*.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
5a48476ec0 target/tricore: Use min/max for saturate
Use tcg_constant_i32 for the bounds.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
7058ff5231 target/ppc: Avoid tcg_const_* in translate.c
All remaining uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
9d15d8e1bb target/ppc: Fix gen_tlbsx_booke206
Fix incorrect read from rD.
Avoid adding 0 when rA == 0.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
4fe0e9db0a target/ppc: Rewrite trans_ADDG6S
Compute all carry bits in parallel instead of a loop.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
a88c0cfadf target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc
All uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
61d4bf3338 target/ppc: Avoid tcg_const_* in fp-impl.c.inc
All uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
36052a7aa9 target/ppc: Avoid tcg_const_* in vsx-impl.c.inc
All remaining uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
06c005f65c target/ppc: Avoid tcg_const_* in xxeval
Initialize a new temp instead of tcg_const_*.
Fix a pasto in a comment.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
4528d720b4 target/ppc: Avoid tcg_const_* in vmx-impl.c.inc
All remaining uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
ffc0ce24fd target/ppc: Avoid tcg_const_i64 in do_vcntmb
Compute both partial results separately and accumulate
at the end, instead of accumulating in the middle.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
999b7c2659 target/m68k: Use tcg_constant_i32 in gen_ea_mode
Return a constant for an immediate input.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
56649fd949 target/arm: Avoid tcg_const_ptr in handle_rev
Here it is not trivial to notice first initialization, so explicitly
zero the temps.  Use an array for the output, rather than separate
tcg_rd/tcg_rd_hi variables.

Fixes a bug by adding a missing clear_vec_high.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
1b7bc9b5c8 target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn
It is easy enough to use mov instead of or-with-zero
and relying on the optimizer to fold away the or.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
a2c4fb8cae target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn
It is easy enough to use mov instead of or-with-zero and relying
on the optimizer to fold away the or.  Use an array for the output,
rather than separate tcg_res{l,h} variables.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
063e6e4527 target/arm: Avoid tcg_const_* in translate-mve.c
All uses are in the context of an accumulator conditionally
having a zero input.  Split the rda variable to rda_{i,o},
and set rda_i to tcg_constant_foo(0) when required.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
d6840b9878 target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}
This hides the implicit initialization of a variable.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:39 -07:00
Richard Henderson
3351889caa target/arm: Improve trans_BFCI
Reorg temporary usage so that we can use tcg_constant_i32.
tcg_gen_deposit_i32 already has a width == 32 special case,
so remove the check here.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 07:03:34 -07:00
Richard Henderson
8d1b02a6a1 target/arm: Create gen_set_rmode, gen_restore_rmode
Split out common subroutines for handing rounding mode
changes during translation.  Use tcg_constant_i32 and
tcg_temp_new_i32 instead of tcg_const_i32.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:38 -07:00
Richard Henderson
97584f2bc8 target/arm: Consistently use ARMFPRounding during translation
In preparation for extracting new helpers, ensure that
the rounding mode is represented as ARMFPRounding and
not FloatRoundMode.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:38 -07:00
Richard Henderson
6ce21abd40 target/arm: Improve arm_rmode_to_sf
Use proper enumeration types for input and output.
Use a const array to perform the mapping, with an
assert that the input is valid.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:38 -07:00
Richard Henderson
ab9ced73fa target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf
While this enumerator has been present since the first commit,
it isn't ever used.  The first actual use of round-to-odd came
with SVE, which currently uses float_round_to_odd instead of
the arm-specific enumerator.

Amusingly, the comment about unhandled TIEAWAY has been
out of date since the initial commit of translate-a64.c.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:38 -07:00
Richard Henderson
0b29090a68 target/arm: Use rmode >= 0 for need_rmode
Initialize rmode to -1 instead of keeping two variables.
This is already used elsewhere in translate-a64.c.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:38 -07:00
Richard Henderson
f04de891b5 tcg: Replace tcg_const_i64 in tcg-op.c
These three instances got missed in previous conversion.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:38 -07:00
Richard Henderson
151293c2fb target/tricore: Avoid tcg_const_i32
All remaining uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:38 -07:00
Richard Henderson
32f948afcf target/tricore: Drop some temp initialization
The temp variables here are always set afterward;
the initialization with a constant was discarded.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:38 -07:00
Richard Henderson
0a47678626 target/tricore: Use setcondi instead of explicit allocation
This removes the only use of temp.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
5c48ad758d target/tricore: Rename t_off10 and use tcg_constant_i32
While temp3 could simply be initialized with tcg_constant_i32,
the renaming makes the purpose clearer.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
bf38ca5c9e target/tricore: Split t_n as constant from temp as variable
As required, allocate temp separately.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
905a83dedf tcg/sparc: Avoid tcg_const_tl in gen_edge
Push tcg_constant_tl into the shift argument directly.
Since t1 no longer exists as a temp, replace with lo1,
whose last use was just above.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
950b91be98 target/sh4: Avoid tcg_const_i32
All remaining uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
d3c2b2b366 target/sh4: Avoid tcg_const_i32 for TAS.B
Since we're assigning to cpu_sr_t in the end,
use that as the intermediate temp as well.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
5bd9790ebc target/s390x: Avoid tcg_const_i64
All uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
daefc08567 target/rx: Avoid tcg_const_i32
All remaining uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
09374ee274 target/rx: Avoid tcg_const_i32 when new temp needed
These three cases use a constant as first input, and
then overwrite the temp in the output.  Separate them.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
bb09b540c4 target/rx: Use cpu_psw_z as temp in flags computation
Since PSW_Z = PSW_S, we can move that assignment to the end
and use PSW_Z as a temporary while computing PSW_O.
Use tcg_constant_i32 instead of tcg_const_i32.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
4b01ff2561 target/rx: Use tcg_gen_abs_i32
Remove the local definition of rx_abs.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
c3be8116d9 target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
5b7a8b81d2 target/ppc: Split out gen_vx_vmul10
Move the body out of this large macro.
Use tcg_constant_i64.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
c29e79af27 target/mips: Avoid tcg_const_* throughout
All remaining uses are strictly read-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
0bcc6b4cfd target/mips: Avoid tcg_const_tl in gen_r6_ld
Allocate a separate temp for modification.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
0694cd597d target/mips: Split out gen_lxr
Common subroutine for LDR and LWR.
Use tcg_constant_tl of ~1 instead of tcg_const_tl of 0x..fe.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00
Richard Henderson
990c162e67 target/mips: Split out gen_lxl
Common subroutine for LDL and LWL.
Use tcg_constant_tl instead of tcg_const_tl and t2.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-13 06:44:37 -07:00