Commit Graph

6465 Commits

Author SHA1 Message Date
Richard Henderson
6cd61517fb target/arm: Move BE32 disassembler fixup
The Capstone disassembler has its own big-endian fixup.
Doing this twice does not work, of course.  Move our current
fixup from target/arm/cpu.c to disas/arm.c.

This makes read_memory_inner_func unused and can be removed.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-25 11:54:52 +02:00
David Hildenbrand
f52bfb1214 accel/tcg: allow to invalidate a write TLB entry immediately
Background: s390x implements Low-Address Protection (LAP). If LAP is
enabled, writing to effective addresses (before any translation)
0-511 and 4096-4607 triggers a protection exception.

So we have subpage protection on the first two pages of every address
space (where the lowcore - the CPU private data resides).

By immediately invalidating the write entry but allowing the caller to
continue, we force every write access onto these first two pages into
the slow path. we will get a tlb fault with the specific accessed
addresses and can then evaluate if protection applies or not.

We have to make sure to ignore the invalid bit if tlb_fill() succeeds.

Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20171016202358.3633-2-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
Halil Pasic
6bb6f19473 s390x: refactor error handling for MSCH handler
Simplify the error handling of the MSCH.  Let the code detecting the
condition tell (in a less ambiguous way) how it's to be handled. No
changes in behavior.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20171017140453.51099-8-pasic@linux.vnet.ibm.com>
[CH: fix return code for fctl != 0]
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
Halil Pasic
ae9f1be3bd s390x: refactor error handling for HSCH handler
Simplify the error handling of the HSCH.  Let the code detecting the
condition tell (in a less ambiguous way) how it's to be handled. No
changes in behavior.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20171017140453.51099-7-pasic@linux.vnet.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
Halil Pasic
773314426e s390x: refactor error handling for CSCH handler
Simplify the error handling of the CSCH.  Let the code detecting the
condition tell (in a less ambiguous way) how it's to be handled. No
changes in behavior.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20171017140453.51099-6-pasic@linux.vnet.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
Halil Pasic
963764081d s390x: refactor error handling for XSCH handler
Simplify the error handling of the XSCH.  Let the code detecting the
condition tell (in a less ambiguous way) how it's to be handled. No
changes in behavior.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20171017140453.51099-5-pasic@linux.vnet.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
Halil Pasic
66dc50f705 s390x: improve error handling for SSCH and RSCH
Simplify the error handling of the SSCH and RSCH handler avoiding
arbitrary and cryptic error codes being used to tell how the instruction
is supposed to end.  Let the code detecting the condition tell how it's
to be handled in a less ambiguous way.  It's best to handle SSCH and RSCH
in one go as the emulation of the two shares a lot of code.

For passthrough this change isn't pure refactoring, but changes the way
kernel reported EFAULT is handled. After clarifying the kernel interface
we decided that EFAULT shall be mapped to unit exception.  Same goes for
unexpected error codes and absence of required ORB flags.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20171017140453.51099-4-pasic@linux.vnet.ibm.com>
Tested-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
[CH: cosmetic changes]
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
Halil Pasic
e443ef9f21 s390x/css: IO instr handler ending control
CSS code needs to tell the IO instruction handlers located in ioinst.c
how the emulated instruction should be ended. Currently this is done by
returning generic (POSIX) error codes, and mapping them to outcomes like
condition codes. This makes bugs easy to create and hard to recognize.

As a preparation for moving away from (mis)using generic error codes for
flow control let us introduce a type which tells the instruction
handler function how to end the instruction, in a more straight-forward
and less ambiguous way.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20171017140453.51099-3-pasic@linux.vnet.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
[CH: cosmetic changes]
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
Cornelia Huck
67915de9f0 s390x/event-facility: variable-length event masks
The architecture supports masks of variable length for sclp write
event mask. We currently only support 4 byte event masks, as that
is what Linux uses.

Let's extend this to the maximum mask length supported by the
architecture and return 0 to the guest for the mask bits we don't
support in core.

Initial patch by: Cornelia Huck <cornelia.huck@de.ibm.com>

Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com>
Message-Id: <1507729193-9747-1-git-send-email-jjherne@linux.vnet.ibm.com>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
Peter Maydell
e67277f8f3 Merge tpm 2017/10/19 v1
-----BEGIN PGP SIGNATURE-----
 
 iQEcBAABAgAGBQJZ6MfvAAoJEHWtZYAqC0IRWbQIAJ2PxlWGzc8s1EjgiGexRlfQ
 8dVDBhRhRZPp+OrrJwbnMQdOqjhdjsfzaJD4kXeokMdz2OkDQflC4DMbLVnCi5l3
 UZCommUtvrRBuNpVhxqude8BWM7Yc6GH4Y//52OyVeM3yZkE35LXwm/wtiEW2RUK
 E1XGT+OAN1Mnn6ocGGiEiZnD3noZrnfc6YOxlVGJOhgREo1Fg9W+pt1ecicA/bKe
 o2spHbZMh+l3ZXAg3/Fzp3T29XeMBUSgnQRyNJGDNYDRALwJhI1qi0akG3YKvnqn
 2MHzQQQwaHsEfObnhDPphm0h498gy4hx8kBWFUjsfHUxxznzQTLFk8sMmO232p8=
 =vEq0
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2017-10-19-1' into staging

Merge tpm 2017/10/19 v1

# gpg: Signature made Thu 19 Oct 2017 16:42:39 BST
# gpg:                using RSA key 0x75AD65802A0B4211
# gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B818 B9CA DF90 89C2 D5CE  C66B 75AD 6580 2A0B 4211

* remotes/stefanberger/tags/pull-tpm-2017-10-19-1: (21 commits)
  tpm: move recv_data_callback to TPM interface
  tpm: add a QOM TPM interface
  tpm-tis: fold TPMTISEmuState in TPMState
  tpm-tis: remove tpm_tis.h header
  tpm-tis: move TPMState to TIS header
  tpm: remove locty_data from TPMState
  tpm-emulator: fix error handling
  tpm: add TPMBackendCmd to hold the request state
  tpm: remove locty argument from receive_cb
  tpm: remove needless cast
  tpm: remove unused TPMBackendCmd
  tpm: remove configure_tpm() hop
  tpm: remove init() class method
  tpm: remove TPMDriverOps
  tpm: move TPMSizedBuffer to tpm_tis.h
  tpm: remove tpm_register_driver()
  tpm: replace tpm_get_backend_driver() to drop be_drivers
  tpm: lookup tpm backend class in tpm_driver_find_by_type()
  tpm: make tpm_get_backend_driver() static
  tpm-tis: remove RAISE_STS_IRQ
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-20 10:49:55 +01:00
Marc-André Lureau
05a699985c tpm: move recv_data_callback to TPM interface
Simplify the TPM backend setup, move callback to TPM interface.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:33 -04:00
Marc-André Lureau
0e43b7e61c tpm: add TPMBackendCmd to hold the request state
This simplifies a bit locality handling, and argument passing, and
could pave the way to queuing requests (if that makes sense).

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:28 -04:00
Marc-André Lureau
d1fd6b563d tpm: remove locty argument from receive_cb
The tpm_state is passed as argument, the assert() is pointless since
we give it the value of tpm_state->locty_number already.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:27 -04:00
Marc-André Lureau
905e78ba25 tpm: remove unused TPMBackendCmd
There is only handling of request so far in both backends.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:25 -04:00
Marc-André Lureau
27a79d96b4 tpm: remove init() class method
No backend use it.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:24 -04:00
Marc-André Lureau
d31076ba75 tpm: remove TPMDriverOps
Use TPMBackendClass to hold class methods/fields.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:23 -04:00
Marc-André Lureau
cfab6da8a7 tpm: move TPMSizedBuffer to tpm_tis.h
Close to where it's being used.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:23 -04:00
Marc-André Lureau
ed836d9d6b tpm: remove tpm_register_driver()
No more users of be_drivers[], drop that too.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:22 -04:00
Marc-André Lureau
349ccdc89c tpm: make tpm_get_backend_driver() static
No need to export the function.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2017-10-19 11:42:20 -04:00
Peter Maydell
a8b392ac9a * TCG 8-byte atomic accesses bugfix (Andrew)
* Report disk rotation rate (Daniel)
 * Report invalid scsi-disk block size configuration (Mark)
 * KVM and memory API MemoryListener fixes (David, Maxime, Peter Xu)
 * x86 CPU hotplug crash fix (Igor)
 * Load/store API documentation (Peter Maydell)
 * Small fixes by myself and Thomas
 * qdev DEVICE_DELETED deferral (Michael)
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAlnnJUgUHHBib256aW5p
 QHJlZGhhdC5jb20ACgkQv/vSX3jHroMifwf/dTZwtGqvAV4+jezCiZ3MTknz39dM
 HOGnD3m2xy04QT5LHiwDmaLFXy1y/AUVQm79JMPN4dKoFvtruREoWUq8EU0FCsLZ
 PkdCbJuXKGiBYMRXkQQxeT8lAyaBQwZdc+O9mYuOrSGZOQscA7SxgClYmzVdVzcy
 ZNTqkuaw1NDIAapdfGv94WLza4Nb8XX8bFwohgkf4mLDXifhjYHQTbBTfB0NqPxH
 Rk3HU+wgYUCJRYXpvktESgzRo5sm1aozCRq3f0Y6RV12ylgF6GG4CyN7YcKRn8eh
 NZbyehHiF5YU2kuvO9SmAB+FqM2+aMtq8uuNuI1Nxgd222MOVaChyWc3jg==
 =gmUj
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* TCG 8-byte atomic accesses bugfix (Andrew)
* Report disk rotation rate (Daniel)
* Report invalid scsi-disk block size configuration (Mark)
* KVM and memory API MemoryListener fixes (David, Maxime, Peter Xu)
* x86 CPU hotplug crash fix (Igor)
* Load/store API documentation (Peter Maydell)
* Small fixes by myself and Thomas
* qdev DEVICE_DELETED deferral (Michael)

# gpg: Signature made Wed 18 Oct 2017 10:56:24 BST
# gpg:                using RSA key 0xBFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (29 commits)
  scsi: reject configurations with logical block size > physical block size
  qdev: defer DEVICE_DEL event until instance_finalize()
  Revert "qdev: Free QemuOpts when the QOM path goes away"
  qdev: store DeviceState's canonical path to use when unparenting
  qemu-pr-helper: use new libmultipath API
  watch_mem_write: implement 8-byte accesses
  notdirty_mem_write: implement 8-byte accesses
  memory: reuse section_from_flat_range()
  kvm: simplify kvm_align_section()
  kvm: region_add and region_del is not called on updates
  kvm: fix error message when failing to unregister slot
  kvm: tolerate non-existing slot for log_start/log_stop/log_sync
  kvm: fix alignment of ram address
  memory: call log_start after region_add
  target/i386: trap on instructions longer than >15 bytes
  target/i386: introduce x86_ld*_code
  tco: add trace events
  docs/devel/loads-stores.rst: Document our various load and store APIs
  nios2: define tcg_env
  build: remove CONFIG_LIBDECNUMBER
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-19 15:38:07 +01:00
Peter Maydell
ba6f0fc25e ui: opengl updates for dma-buf support.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABAgAGBQJZ5eXgAAoJEEy22O7T6HE4nhEQANHY8Exu2HFGKHbd59IR7MAl
 jc3CiT5tc9/HGcPuhUw5BuEBpd053/COZQktSTAjOUYo7tDmwM+dbEz5SU0dIVXf
 hu1ZoAvgOmC+X+TZRY2YyFrjvwjORRxATxnLlg3ETTDbaEu8EI4G0xA8NYox7j1X
 nPduAsSEK4YiPcOkfbi2LmQIaLE4phtmFnVed0cLWG0hE1n1KWDu0TQGQB4ZNLb1
 t5RtEc/qLrkVSGupLy0lwBIlMGAFZzjmr2co13IpPd6Weow8v++c68aO6PtAWQWA
 pFhDuWwENg/LshyHa2tgWg+QaGl5p+306fVq79RX23juLZ5OaPyPtuptL2uXen5N
 74GroqLwkbl9TabjLpmNGGLvwKwV5cLtmpGW/t4jAX0fhb0RjfMwIeazgeWkifED
 z4o7tkXTR9EUc+6nHYXbdy5okmxBXv3JvDM9LAMG1d3c4T9VRsKJJMwoPclbkwi1
 SxGLoYvz9IU4VjYAkFgoeYeKGX9UbJPzKp3kyuczZEAAm8Gd9uaAhCYvIk9nE/Mi
 JlPPfz1J8EerdD2mJjbIMZvz/7mvcrkRhQBzM/bTUDxuVTdWVrD+mP5qoq7XuApi
 0GgMJbubYEBSBsD3tpRArSOkLmoRanH9CaGetY5o2m4p+BaQ7ssiCQ5oPczrW4lj
 L83OfkWx4PiBB5swQHv1
 =P3Cr
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/kraxel/tags/opengl-20171017-pull-request' into staging

ui: opengl updates for dma-buf support.

# gpg: Signature made Tue 17 Oct 2017 12:13:36 BST
# gpg:                using RSA key 0x4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/opengl-20171017-pull-request:
  egl-headless: add dmabuf support
  egl-helpers: add egl_texture_blit and egl_texture_blend
  egl-helpers: add dmabuf import support
  opengl: add flipping vertex shader
  opengl: move shader init from console-gl.c to shader.c
  console: add support for dmabufs

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-19 12:09:53 +01:00
Michael Roth
04162f8f4b qdev: store DeviceState's canonical path to use when unparenting
device_unparent(dev, ...) is called when a device is unparented,
either directly, or as a result of a parent device being
finalized, and handles some final cleanup for the device. Part
of this includes emiting a DEVICE_DELETED QMP event to notify
management, which includes the device's path in the composition
tree as provided by object_get_canonical_path().

object_get_canonical_path() assumes the device is still connected
to the machine/root container, and will assert otherwise, but
in some situations this isn't the case:

If the parent is finalized as a result of object_unparent(), it
will still be attached to the composition tree at the time any
children are unparented as a result of that same call to
object_unparent(). However, in some cases, object_unparent()
will complete without finalizing the parent device, due to
lingering references that won't be released till some time later.
One such example is if the parent has MemoryRegion children (which
take a ref on their parent), who in turn have AddressSpace's (which
take a ref on their regions), since those AddressSpaces get cleaned
up asynchronously by the RCU thread.

In this case qdev:device_unparent() may be called for a child Device
that no longer has a path to the root/machine container, causing
object_get_canonical_path() to assert.

Fix this by storing the canonical path during realize() so the
information will still be available for device_unparent() in such
cases.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20171016222315.407-2-mdroth@linux.vnet.ibm.com>
[Clear dev->canonical_path at the post_realize_fail label, which is
 cleaner.  Suggested by David Gibson. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-10-18 10:34:17 +02:00
Peter Maydell
861cd431c9 ppc patch queue 2017-10-17
Here's the currently accumulated set of ppc patches for qemu.
 
   * The biggest set here is the ppc parts of Igor Mammedov's cleanups
     to cpu model handling
   * The above also includes a generic patches which are required as
     prerequisites for the ppc parts.  They don't seem to have been
     merged by Eduardo yet, so I hope they're ok to include here.
   * Apart from that it's basically just assorted bug fixes and cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEdfRlhq5hpmzETofcbDjKyiDZs5IFAlnlhPMACgkQbDjKyiDZ
 s5KiJBAAqYjaecPkh24mKGTXsyCkG2hq0Pmlg2CDRSxLQZICZOaE4zO26jGFvPSE
 1Y6zcyjhzQ75xg8uJeuD8i9L04u9XPkLzgQ42ZwxNggLaM+yf8av+7B6pXLhi/3q
 yMXOWR4VdSde9EYus6H58jSTmhUBjp3LlbTsfVLviN4Pw/EgZ+Jg1zVQu5SUwRoP
 U1bHnzN3L3BoEEN/QnCx05FI8Le9b4WJl4YNyivqZKGI9+xsztVSOEhe30fZYQX6
 erbaVICBGpLJziS4F90h0H8I3eUlW6YF2HgCRVolCeUXPQo0kNCrxfPyw7+ct+yJ
 Mr7fsng+grhKsY6LKL0+oZM5mUJD79ZviAd7Q1cmdwZrWcNwBXnuAhDehJJGzekM
 q6I9vv7Lq9a+Bqx0APBNOThFCK8+zHcdMPfwnlSCaR/jSwxd7ZzFxSNgqqVoPGtN
 gE/gYgq91g1+kBNZNf5J5n6QSobL7RpkCrjZVVN8z1EE/aqsK2i2Goav7gwLJF0C
 zVGGNdpqhn76EeXqMVrTOFO1hyfvE+dH7vdlUtqWqxbfm0ndQZH/cOV/Uqrx3D42
 jA7lb0Y/IAVrVY784Q+o54vFmD1k1zIOXLsjG/1QfcT9urA9ghuwn97Tbyms1PnC
 wYHIg3PuKb3CaM//hEp+iM+p+UWqxPMQOh0BFNzvVpOZNlZ1k/4=
 =aRCf
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.11-20171017' into staging

ppc patch queue 2017-10-17

Here's the currently accumulated set of ppc patches for qemu.

  * The biggest set here is the ppc parts of Igor Mammedov's cleanups
    to cpu model handling
  * The above also includes a generic patches which are required as
    prerequisites for the ppc parts.  They don't seem to have been
    merged by Eduardo yet, so I hope they're ok to include here.
  * Apart from that it's basically just assorted bug fixes and cleanups

# gpg: Signature made Tue 17 Oct 2017 05:20:03 BST
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.11-20171017: (34 commits)
  spapr_cpu_core: rewrite machine type sanity check
  spapr_pci: fail gracefully with non-pseries machine types
  spapr: Correct RAM size calculation for HPT resizing
  ppc: pnv: consolidate type definitions and batch register them
  ppc: pnv: drop PnvChipClass::cpu_model field
  ppc: pnv: define core types statically
  ppc: pnv: drop PnvCoreClass::cpu_oc field
  ppc: pnv: normalize core/chip type names
  ppc: pnv: use generic cpu_model parsing
  ppc: spapr: use generic cpu_model parsing
  ppc: move ppc_cpu_lookup_alias() before its first user
  ppc: spapr: use cpu model names as tcg defaults instead of aliases
  ppc: spapr: register 'host' core type along with the rest of core types
  ppc: spapr: use cpu type name directly
  ppc: spapr: define core types statically
  ppc: move '-cpu foo,compat=xxx' parsing into ppc_cpu_parse_featurestr()
  ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model()
  ppc: 40p/prep: replace cpu_model with cpu_type
  ppc: virtex-ml507: replace cpu_model with cpu_type
  ppc: replace cpu_model with cpu_type on ref405ep,taihu boards
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-17 15:26:51 +01:00
Peter Maydell
a9038e5e19 trivial patches for 2017-10-16
-----BEGIN PGP SIGNATURE-----
 
 iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAlnlF0UPHG1qdEB0bHMu
 bXNrLnJ1AAoJEHAbT2saaT5ZtogH/1oNUQoasAIiUwhj+y5F7aCN43J0oR6AQ4Dy
 lMB+u9xoYEnaDeBxIcuwu4UpWaVkx2/dZlsn8nZg5KhQmRMEnnVJIkipPyEngvdX
 7i4pA3F2ge27+qGbcjPu+Z4K2mTjeE2TJcJkySjR+A2dkOyd7/UgabYKIbGVUwNk
 EDTy1ZTq1OZKWU3romC/RrlMZtEKAUC2Fdgukvmki6ayX5+SCqn1Wba6qW1jA+PM
 nEQxpHQdPkY4ZRswT1Szn2h50KNie+dHHktRkabHizilBgEc9ueROl4dfDVY2gq/
 1rSNcF0MXZS3SAAVp3ivlMR+zgFFYwvXc16NOHDAJPI2r6cxJ1A=
 =BO/a
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into staging

trivial patches for 2017-10-16

# gpg: Signature made Mon 16 Oct 2017 21:32:05 BST
# gpg:                using RSA key 0x701B4F6B1A693E59
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
# gpg:                 aka "Michael Tokarev <mjt@debian.org>"
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
#      Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931  4B22 701B 4F6B 1A69 3E59

* remotes/mjt/tags/trivial-patches-fetch:
  Add myself as maintainer for TPM code
  filter-mirror: segfault when specifying non existent device
  MAINTAINERS: Track default-configs/pci.mak
  MAINTAINERS: Fix Sun4v file
  MAINTAINERS: Clean up SCSI device section
  include/hw/or-irq.h: Drop unused in_irqs field
  io: Add missing GCC_FMT_ATTR (fix -Werror=suggest-attribute=format)
  os-posix: Drop misleading comment
  linux-user: Add some random ioctls
  futex: add missing header guards
  ui/gtk: Fix deprecation of vte_terminal_copy_clipboard
  gitignore: ignore check-qlit test
  linux-user: remove duplicate break in syscall
  qemu-doc.texi: remove trailing whitespace

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-17 13:13:03 +01:00
Peter Maydell
dabc50e4c6 Merge QIO 2017/10/16 v1
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJZ5NoOAAoJEL6G67QVEE/fbqMQAJzQT94741PSAZ0jAEEJitLK
 9Z9fHxbxfM1MErc8c5N8WmNAjoL90l87DRigFFoxVimtA9YyTXybjYlCiMgoR5rN
 AWM/IVsGfaEW9V7s/VtdpqOFf1YkQ9KblPt4kpNyqF233NjGXl37HIpbgS3zvVB+
 Fl/TrBLx6hg8EKJyMZhkAplarUaAKx2/floRHCwnchW/W2wvMR3Oj9SwQXS6w0BG
 OhRUfBXC7IoS8DtjXtYudjL3JQVYuj8ytqk9oer8pHXBt6E6x/ym33t4sUQvN/sw
 FDJ003qla26FmJOr6wNYBV409IC1TVR6LZXANy/AXwuGVLlGkZh3U/wiJkbYIl+e
 OLNJ25a4hje4ynrd4WasNc9wt+SaR+MYSmSs7hAL4P++W7qsCTCyjZra4PiwsMz/
 G3pCTDnxccIRvRYTFBA1PjLCzLzLgzR96wIuVc7v8KU15ev0El2d7JEoX3GJTQtg
 qgCHctkNKFmUeijiQIXSEMlc9DP6u9hynKlucJu6e0GM1NIKzULhPLeNQZypCNpb
 OsOcuU9mwVl2+EDWfusOI0bGsBXA23a9ELm8KACHkMPSAvFbwXyH75xJu/um2HwV
 KOI6dFshPOzeWS0Dp9TGR2U38a+1bvpEA6LWYIYGCdFalh8RaaTCd1QnkylejNEQ
 apNAEXal5wgCdqsVzZUb
 =c5gF
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/berrange/tags/pull-qio-2017-10-16-1' into staging

Merge QIO 2017/10/16 v1

# gpg: Signature made Mon 16 Oct 2017 17:10:54 BST
# gpg:                using RSA key 0xBE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>"
# gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>"
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E  8E3F BE86 EBB4 1510 4FDF

* remotes/berrange/tags/pull-qio-2017-10-16-1:
  io: fix mem leak in websock error path
  io: add trace points for websocket HTTP protocol headers
  io: cope with websock 'Connection' header having multiple values
  io: get rid of bounce buffering in websock write path
  io: pass a struct iovec into qio_channel_websock_encode
  io: get rid of qio_channel_websock_encode helper method
  io: simplify websocket ping reply handling
  io: monitor encoutput buffer size from websocket GSource
  sockets: Handle race condition between binds to the same port
  sockets: factor out create_fast_reuse_socket
  sockets: factor out a new try_bind() function

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-17 11:29:52 +01:00
Peter Maydell
a4faa26857 ui: use keycodemapdb for key code mappings, part one (v2)
ui: add qemu-keymap, update reverse keymaps (for qemu -k $map)
 ui: fix for vte 0.50
 ui: gtk texture fix
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABAgAGBQJZ5LBRAAoJEEy22O7T6HE4EPAQANjz0fHDy4BWjqMpuery4HQy
 de2t1skrvr50fS1EGDxFjzr40+ap28KluNf/5CJtkDiwyVRKfF7glWZ+aOzZAGzn
 DobJd3Eqz+CAgaaGlJ3XzjXZdMEusQ8SYyJ5uOmWTDCo0iN72+1kOqYnESAZM5pb
 WfDybUearA3ylzR8dE8AuF/+f3nC66mddyMgVOwJ4AuEWnKMXDGyYTu794I04Lnz
 erM2a1g5hGAWNdzmMU9PUuBrnndwybm0gkkaMDqFavw3vjhcrVm5kFmwpgJ0ZXCK
 pQp1lcvcIYW6Nsu79uE2Esc/wqnGqR3NBEpl1R81O077/kZhluSyZVd01nNEjr0U
 hLCh7blebxIH3/6LzY04UVDB4f8ORo6TXNpXZaoZ/vg6Vrt5omYLRUO9Cp3++C4z
 mSC+mVW5zCSbhQEIXhaSpQxA721jrm7uyqaYt2rreRUJXOvXujoH+GOfC96GQTRr
 9Oay5vJrWrY8djlTCTpJV+x5/p2bA9jbfO2918CPfoE+ARNGK6okU5xur/SfY38o
 aFmtStoP5uRGTNC+vtasxneUiV0oR7SdNXDhO09KlTA964NilOUs0U5Bo5IfuqFE
 3Jy50TNAxICyFLn4AJFIdihKZiodZMzr0VjurmYY6LEeba2DfV77s/uHW5ft+LNv
 KjZl2BrOwdX1jhHGQB0E
 =N+oP
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/kraxel/tags/ui-20171016-pull-request' into staging

ui: use keycodemapdb for key code mappings, part one (v2)
ui: add qemu-keymap, update reverse keymaps (for qemu -k $map)
ui: fix for vte 0.50
ui: gtk texture fix

# gpg: Signature made Mon 16 Oct 2017 14:12:49 BST
# gpg:                using RSA key 0x4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/ui-20171016-pull-request:
  gtk: fix wrong id between texture and framebuffer
  ui/gtk: Fix deprecation of vte_terminal_copy_clipboard
  pc-bios/keymaps: keymaps update
  Add pc-bios/keymaps/Makefile
  tools: add qemu-keymap
  ui: don't export qemu_input_event_new_key
  ui: convert key events to QKeyCodes immediately
  ui: convert common input code to keycodemapdb
  ui: add keycodemapdb repository as a GIT submodule
  docker: don't rely on submodules existing in the main checkout
  build: automatically handle GIT submodule checkout for dtc

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-17 10:03:33 +01:00
Gerd Hoffmann
0eb50c2737 egl-helpers: add egl_texture_blit and egl_texture_blend
egl_texture_blit() blits a texture, simliar to egl_fb_blit() but by
rendering the texture to the screen instead of using a framebuffer blit.

egl_texture_blend() renders a texture with alpha blending, will be used
to render the cursor to the screen.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20171010135453.6704-6-kraxel@redhat.com
2017-10-17 10:25:42 +02:00
Gerd Hoffmann
86c0522c63 egl-helpers: add dmabuf import support
Add helper function to import a dma-buf as opengl texture.
Also add a helper to release the texture again.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20171010135453.6704-5-kraxel@redhat.com
2017-10-17 10:25:42 +02:00
Gerd Hoffmann
2e1d70b9e0 opengl: add flipping vertex shader
Add vertex shader which flips the texture upside down while blitting it.
Add argument to qemu_gl_run_texture_blit() to enable flipping.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20171010135453.6704-4-kraxel@redhat.com
2017-10-17 10:25:42 +02:00
Gerd Hoffmann
46e19e149f opengl: move shader init from console-gl.c to shader.c
With the upcoming dmabuf support in qemu there will be more users of the
shaders than just console-gl.c.  So rename ConsoleGLState to
QemuGLShader, rename some functions too, move code from console-gl.c to
shaders.c.

No functional change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20171010135453.6704-3-kraxel@redhat.com
2017-10-17 10:25:42 +02:00
Gerd Hoffmann
4133fa711f console: add support for dmabufs
This patch adds support for dma-bufs to the qemu console interfaces.
It adds a new "struct QemuDmaBuf" to represent a dmabuf with accociated
metatdata (size, format).  It adds three functions (and
DisplayChangeListenerOps operations) to set a dma-buf as display
scanout, as cursor and to release a dmabuf.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id: 20171010135453.6704-2-kraxel@redhat.com
2017-10-17 10:25:42 +02:00
Igor Mammedov
40abf43f72 ppc: pnv: drop PnvChipClass::cpu_model field
deduce core type directly from chip type instead of
maintaining type mapping in PnvChipClass::cpu_model.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:01 +11:00
Igor Mammedov
35bdb9def2 ppc: pnv: drop PnvCoreClass::cpu_oc field
deduce cpu type directly from core type instead of
maintaining type mapping in PnvCoreClass::cpu_oc and doing
extra cpu_model parsing in pnv_core_class_init()

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:01 +11:00
Igor Mammedov
7fd544d8a7 ppc: pnv: normalize core/chip type names
typically for cpus/core type names following convention is used

   new_type_prefix-superclass_typename

make PNV core/chip to follow common convention.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:01 +11:00
Igor Mammedov
4a12c699d3 ppc: pnv: use generic cpu_model parsing
use common cpu_model prasing in vl.c and set default cpu_model
using generic MachineClass::default_cpu_type.

Beside of switching to generic infrastructure it solves several
issues.

 * ppc_cpu_class_by_name() is used to deal with lower/upper case
   and alias translations into actual cpu type, which fixes
    '-M powernv -cpu power8' and '-M powernv -cpu power9_v1.0'
   usecases which error out with:
    'invalid CPU model 'FOO' for powernv machine'
 * allows to switch to lower-case typenames in pnv chip/core name
   (by convention typnames should be lower-case)
 * replace aliased names /power8, power9, .../ with exact cpu model
   names (i.e. typenames should be stable but aliases might decide to
   point to other cpu model withi family or changed by kvm). It will
   also help to simplify pnv_chip/core code and get rid of dependency
   on cpu_model parsing.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[dwg: Updated to make DD2.0 as default POWER9 chip]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:01 +11:00
Igor Mammedov
2e9c10eba0 ppc: spapr: use generic cpu_model parsing
use generic cpu_model parsing introduced by
 (6063d4c0f vl.c: convert cpu_model to cpu type and set of global properties before machine_init())

it allows to:
  * replace sPAPRMachineClass::tcg_default_cpu with
    MachineClass::default_cpu_type
  * drop cpu_parse_cpu_model() from hw/ppc/spapr.c and reuse
    one in vl.c
  * simplify spapr_get_cpu_core_type() by removing
    not needed anymore recurrsion since alias look up
    happens earlier at vl.c and spapr_get_cpu_core_type()
    works only with resulted from that cpu type.
  * spapr no more needs to parse/depend on being phased out
    MachineState::cpu_model, all tha parsing done by generic
    code and target specific callback.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
[dwg: Correct minor compile error]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:01 +11:00
Igor Mammedov
5bbb264186 ppc: spapr: register 'host' core type along with the rest of core types
consolidate 'host' core type registration by moving it from
KVM specific code into spapr_cpu_core.c, similar like it's
done in x86 target.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:00 +11:00
Igor Mammedov
b51d3c8818 ppc: spapr: use cpu type name directly
replace sPAPRCPUCoreClass::cpu_class with cpu type name
since it were needed just to get that at points it were
accessed.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:00 +11:00
Igor Mammedov
44cd95e31a ppc: spapr: define core types statically
spapr core type definition doesn't have any fields that
require it to be defined at runtime. So replace code
that fills in TypeInfo at runtime with static TypeInfo
array that does the same at complie time.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:00 +11:00
Igor Mammedov
b8e999673b ppc: move '-cpu foo,compat=xxx' parsing into ppc_cpu_parse_featurestr()
there is a dedicated callback CPUClass::parse_features
which purpose is to convert -cpu features into a set of
global properties AND deal with compat/legacy features
that couldn't be directly translated into CPU's properties.

Create ppc variant of it (ppc_cpu_parse_featurestr) and
move 'compat=val' handling from spapr_cpu_core.c into it.
That removes a dependency of board/core code on cpu_model
parsing and would let to reuse common -cpu parsing
introduced by 6063d4c0

Set "max-cpu-compat" property only if it exists, in practice
it should limit 'compat' hack to spapr machine and allow
to avoid including machine/spapr headers in target/ppc/cpu.c

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:00 +11:00
Igor Mammedov
a1063aa8a5 ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model()
ppc_cpu_parse_features() is doing practically the same thing as
generic cpu_parse_cpu_model(). So remove duplicated impl. and
reuse generic one.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:00 +11:00
Igor Mammedov
38b5d79b2e qom: add helper macro DEFINE_TYPES()
DEFINE_TYPES() will help to simplify following routine patterns:

 static void foo_register_types(void)
 {
    type_register_static(&foo1_type_info);
    type_register_static(&foo2_type_info);
    ...
 }

 type_init(foo_register_types)

or

 static void foo_register_types(void)
 {
    int i;

    for (i = 0; i < ARRAY_SIZE(type_infos); i++) {
        type_register_static(&type_infos[i]);
    }
 }

 type_init(foo_register_types)

with a single line

 DEFINE_TYPES(type_infos)

where types have static definition which could be consolidated in
a single array of TypeInfo structures.
It saves us ~6-10LOC per use case and would help to replace
imperative foo_register_types() there with declarative style of
type registration.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:00 +11:00
Igor Mammedov
aa04c9d207 qom: introduce type_register_static_array()
it will help to remove code duplication of registration
static types in places that have open coded loop to
perform batch type registering.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-17 10:34:00 +11:00
Peter Maydell
69fa4f9568 include/hw/or-irq.h: Drop unused in_irqs field
The struct OrIRQState has an unused member field in_irqs.
This is a legacy of earlier versions of the patch; the
code that used it was dropped from the final version of
the code that went into master, but we forgot to delete
the no-longer-used struct field. Do so now.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-10-16 21:09:15 +03:00
Emilio G. Cota
f3245d63a0 futex: add missing header guards
The header file was introduced by fbcc3e5 ("qemu-thread: optimize QemuLockCnt
with futexes on Linux", 2017-01-16) without header guards. Add them.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-10-16 20:57:13 +03:00
Peter Maydell
c5bbcaa4b7 pc, pci, virtio: fixes, features
A bunch of fixes all over the place.
 A new vmcore device - the user interface around it is still somewhat
 controversial, but I feel most of the code is fine, suggestions can be
 addressed by adding patches on top.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
 -----BEGIN PGP SIGNATURE-----
 
 iQEcBAABAgAGBQJZ4s+/AAoJECgfDbjSjVRpHQMH/2fVQ9b70BvG4KFpzwhIT3dg
 eyglA9NsXTVINcGu598ZoBD+1OF1N23o6SpcOd56nyLnBwAWiwfnOk05Ncx7WQ4g
 VZoxWcpzrG6SO1Hczg4y1EfT1+cIhlaf3a0kuVGmDTb/zPdMwAqAzw0rjvY5uIjY
 wixOWXfJ34Tq8PNrFIaWECuI5Php+QVTNnvvKQTzgWn1iksj1a4pdZb6/Jd5SLFY
 6hjtfZccDSsqeOduoJMJGJ2pHLbZEaqpxzPBM/AVW0BdWTpeOPI12SazZwUfEcLe
 uHoIASknekX9E6U57l0syRHlvBTnaZkJ0YIw4e3Z08qPBYOL8eFr+M8kjHaIIxc=
 =yEmz
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

pc, pci, virtio: fixes, features

A bunch of fixes all over the place.
A new vmcore device - the user interface around it is still somewhat
controversial, but I feel most of the code is fine, suggestions can be
addressed by adding patches on top.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Sun 15 Oct 2017 04:02:23 BST
# gpg:                using RSA key 0x281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (26 commits)
  tests/pxe: Test more NICs when running in SPEED=slow mode
  pc: remove useless hot_add_cpu initialisation
  isapc: Remove unnecessary migration compatibility code
  virtio-pci: Replace modern_as with direct access to modern_bar
  virtio: fix descriptor counting in virtqueue_pop
  hw/gen_pcie_root_port: make IO RO 0 on IO disabled
  pci: Validate interfaces on base_class_init
  xen/pt: Mark TYPE_XEN_PT_DEVICE as hybrid
  pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
  pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices
  pci: Add interface names to hybrid PCI devices
  pci: conventional-pci-device and pci-express-device interfaces
  PCI: PCIe access should always be little endian
  virtio/pci/migration: Convert to VMState
  hw/pci-bridge/pcie_pci_bridge: properly handle MSI unavailability case
  pci: allow 32-bit PCI IO accesses to pass through the PCI bridge
  virtio/vhost: reset dev->log after syncing
  MAINTAINERS: add Dump maintainers
  scripts/dump-guest-memory.py: add vmcoreinfo
  kdump: set vmcoreinfo location
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-16 17:29:16 +01:00
Daniel P. Berrange
8dfd5f9651 io: get rid of bounce buffering in websock write path
Currently most outbound I/O on the websock channel gets copied into the
rawoutput buffer, and then immediately copied again into the encoutput
buffer, with a header prepended. Now that qio_channel_websock_encode
accepts a struct iovec, we can trivially remove this bounce buffering
and write directly to encoutput.

In doing so, we also now correctly validate the encoutput size against
the QIO_CHANNEL_WEBSOCK_MAX_BUFFER limit.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2017-10-16 16:57:08 +01:00
Daniel P. Berrange
57b0cdf152 io: simplify websocket ping reply handling
We must ensure we don't get flooded with ping replies if the outbound
channel is slow. Currently we do this by keeping the ping reply in a
separate temporary buffer and only writing it if the encoutput buffer
is completely empty. This is overly pessimistic, as it is reasonable
to add a ping reply to the encoutput buffer even if it has previous
data in it, as long as that previous data doesn't include a ping
reply.

To track this better, put the ping reply directly into the encoutput
buffer, and then record the size of encoutput at this time in
pong_remain. As we write encoutput to the underlying channel, we
can decrement the pong_remain counter. Once it hits zero, we can
accept further ping replies for transmission.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2017-10-16 16:57:08 +01:00
Peter Maydell
79b2a13aa8 nbd patches for 2017-10-14
- Marc-André Lureau - NBD: use g_new() family of functions
 - Vladimir Sementsov-Ogievskiy - first half of 00/13 nbd minimal structured read
 -----BEGIN PGP SIGNATURE-----
 Comment: Public key at http://people.redhat.com/eblake/eblake.gpg
 
 iQEcBAABCAAGBQJZ4q4XAAoJEKeha0olJ0NqEooH/R8NKYACELA39xrLdEMUQuZY
 1Lm3/OtpBIICKx7OiZ7LniqApAI++FgjNxOf6PAfNG0TmEA+wMFaZ6NJEdi9DAmv
 kJVLsxiqKLDD+WIKMq5XfZQoFMJ8rV8W2/BYx9cF3Pl4KMT20qDsumsncZJ7DGOR
 jjsbAI8Q6g45VBx6TJbxXiTMDj87nIyNaydAGzRQTmEHtnmh8mllPiuEhJu24l6G
 7CQKfcu4/7Te/5PvJIPn7CxHdVjLYalgWDRkU3kXcwmO8vGQEkYoiHPoc8lGsGtw
 oXJ2YIODYBIjeICkF0/PjT9aoeJQG8EuHR1hT0CW5dVBZz/DlVP/j+EZ6IDV/8k=
 =ud0Z
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2017-10-14' into staging

nbd patches for 2017-10-14

- Marc-André Lureau - NBD: use g_new() family of functions
- Vladimir Sementsov-Ogievskiy - first half of 00/13 nbd minimal structured read

# gpg: Signature made Sun 15 Oct 2017 01:38:47 BST
# gpg:                using RSA key 0xA7A16B4A2527436A
# gpg: Good signature from "Eric Blake <eblake@redhat.com>"
# gpg:                 aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>"
# gpg:                 aka "[jpeg image of size 6874]"
# Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2  F3AA A7A1 6B4A 2527 436A

* remotes/ericb/tags/pull-nbd-2017-10-14:
  nbd: header constants indenting
  nbd/server: simplify reply transmission
  nbd/server: refactor nbd_co_send_simple_reply parameters
  nbd/server: do not use NBDReply structure
  nbd/server: structurize simple reply header sending
  nbd: rename some simple-request related objects to be _simple_
  block/nbd-client: refactor nbd_co_receive_reply
  block/nbd-client: assert qiov len once in nbd_co_request
  NBD: use g_new() family of functions

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-16 15:54:42 +01:00
Peter Maydell
48ae1f60d8 -----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJZ4MRiAAoJEJykq7OBq3PIesUIAJW3Rzs14nv8vOXh584fsPdi
 OkUWrRX8gSFvRh0KRqNiM6KzKBUm43IzNspiABcPapE4uQYup9z9lGuEFQb75H4j
 BZTH/LMAiWiSA6TXNy83aF+onCRNP8NmC0JOJ8TK0tKuEABJb2h72Lb+b7KhKLR+
 uRBuPSN/8BMsoBDcBYIny7pw/VNNwXeOj+vYWWnuq5EI0U/49UDhjNeshe1Wq8Jb
 vYAMDWEXuz6roFcZhOou7MuZjKOkr3trAaQxYXu8kYrtAhCsuOl8OKePAzjaJ0KJ
 6W318ooo4lNH9LD4cXXVKQWE+jBMl6/fIeWXeJ6VuRLDnF2W9rOYI2OFm8GpBjU=
 =nX0J
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging

# gpg: Signature made Fri 13 Oct 2017 14:49:22 BST
# gpg:                using RSA key 0x9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha/tags/block-pull-request:
  block/throttle.c: add bdrv_co_drain_begin/end callbacks
  block: rename bdrv_co_drain to bdrv_co_drain_begin
  block: add bdrv_co_drain_end callback

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-16 14:28:13 +01:00