Commit Graph

1 Commits

Author SHA1 Message Date
Edgar E. Iglesias
b89de436ff hw/arm: versal: Add a model of Xilinx Versal SoC
Add a model of Xilinx Versal SoC.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20181102131913.1535-2-edgar.iglesias@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-11-02 14:10:53 +00:00