Commit Graph

41182 Commits

Author SHA1 Message Date
Edgar E. Iglesias
1edee4708a target-arm: Suppress TBI for S2 translations
Stage-2 MMU translations do not have configurable TBI as
the top byte is always 0 (48-bit IPAs).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1442135278-25281-5-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:50 +01:00
Edgar E. Iglesias
b698e9cfd2 target-arm: Add VTTBR_EL2
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1442135278-25281-4-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:50 +01:00
Edgar E. Iglesias
68e9c2fe65 target-arm: Add VTCR_EL2
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1442135278-25281-3-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: fixed typo in comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:50 +01:00
Edgar E. Iglesias
6533a1fcc2 hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefully
Handle missing CPU support for EL3 gracefully.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1442135278-25281-2-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:49 +01:00
Jean-Christophe Dubois
6abc7158cb i.MX: Add GPIO devices to i.MX25 SOC
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 2eb129ba8713aedfe877eaa3d8de80061d880fbb.1441828793.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:49 +01:00
Jean-Christophe Dubois
dde0c4ca6b i.MX: Add GPIO devices to i.MX31 SOC
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 60b67c9a8b948159f4b4163ead86fbf701c011c6.1441828793.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:49 +01:00
Jean-Christophe Dubois
f442728097 i.MX: Add GPIO device
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 5ea3b0021e47cf7f7d883a7edbabee44980f3df7.1441828793.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:49 +01:00
Richard Henderson
7cb36e18b2 target-arm: Use tcg_gen_extrh_i64_i32
Usually, eliminate an operation from the translator by combining
a shift with an extract.

In the case of gen_set_NZ64, we don't need a boolean value for cpu_ZF,
merely a non-zero value.  Given that we can extract both halves of a
64-bit input in one call, this simplifies the code.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-12-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:49 +01:00
Richard Henderson
8fb0ad8e16 target-arm: Recognize ROR
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-11-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:49 +01:00
Richard Henderson
d3a77b42de target-arm: Eliminate unnecessary zero-extend in disas_bitfield
For !SF, this initial ext32u can't be optimized away by the
current TCG code generator.  (It would require backward bit
liveness propagation.)

But since the range of bits for !SF are already constrained by
unallocated_encoding, we'll never reference the high bits anyway.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-10-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:48 +01:00
Richard Henderson
9924e85829 target-arm: Recognize UXTB, UXTH, LSR, LSL
These are all special case aliases of UBFM.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-9-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:48 +01:00
Richard Henderson
ef60151bee target-arm: Recognize SXTB, SXTH, SXTW, ASR
These are all special case aliases of SBFM.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-8-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:48 +01:00
Richard Henderson
6e061029d7 target-arm: Implement fcsel with movcond
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-7-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:48 +01:00
Richard Henderson
7dd03d773e target-arm: Implement ccmp branchless
This can allow much of a ccmp to be elided when particular
flags are subsequently dead.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-6-git-send-email-rth@twiddle.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:48 +01:00
Richard Henderson
259cb68491 target-arm: Use setcond and movcond for csel
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-5-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:47 +01:00
Richard Henderson
9305eac09e target-arm: Handle always condition codes within arm_test_cc
Handling this with TCG_COND_ALWAYS will allow these unlikely
cases to be handled without special cases in the rest of the
translator.  The TCG optimizer ought to be able to reduce
these ALWAYS conditions completely.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-4-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:47 +01:00
Richard Henderson
6c2c63d3a0 target-arm: Introduce DisasCompare
Split arm_gen_test_cc into 3 functions, so that it can be reused
for non-branch TCG comparisons.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-3-git-send-email-rth@twiddle.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:47 +01:00
Richard Henderson
78bcaa3e37 target-arm: Share all common TCG temporaries
This is a bug fix for aarch64.  At present, we have branches using
the 32-bit (translate.c) versions of cpu_[NZCV]F, but we set the flags
using the 64-bit (translate-a64.c) versions of cpu_[NZCV]F.  From
the view of the TCG code generator, these are unrelated variables.

The bug is hard to see because we currently only read these variables
from branches, and upon reaching a branch TCG will first spill live
variables and then reload the arguments of the branch.  Since the
32-bit versions were never live until reaching the branch, we'd re-read
the data that had just been spilled from the 64-bit versions.

There is currently no such problem with the cpu_exclusive_* variables,
but there's no point in tempting fate.

Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1441909103-24666-2-git-send-email-rth@twiddle.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:47 +01:00
Alistair Francis
24cfc8dc58 xlnx-zynqmp: Remove unnecessary brackets around error messages
The errp and err variable have unnecessary brackets around them,
so remove the brackets.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 9900393572b63f2ec3d68785ca98193d81e0ac71.1441758563.git.alistair.francis@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:47 +01:00
Nathan Rossi
52c16b458a arm: xlnx-zynqmp: Fix up GIC region size
The GIC in ZynqMP cover a 64K address space, however the actual
registers are decoded within a 4K address space and mirrored at the 4K
boundaries. This change fixes the defined size for these regions as it
was set to 0x4000/16K incorrectly.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1441719672-25296-1-git-send-email-nathan@nathanrossi.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:47 +01:00
Peter Maydell
2b750d9d26 sh4-next:
- TCG optimizations
 - fix initramfs endianness issue
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV9eecAAoJELqceAYd3Yyb1ToP+gP9DAE3VNVHZs0XHi27Sa8/
 zRjLSJ+Fq0M8QfXIGmwu6Ym15Ezwtchsddx2GEvFQoSwsbWHxtN8EHceTIjPjoMp
 JN5Xu1DqbkU1quqVEH7I/mZIUQZXwtQtgFoEp7Elw6wlDTdnJi3AZ2u36l/iqQSG
 4Ma6ypPiWXZbDJbwCSn/+T8MMlQ+h9s4cLjkXipg45qNPS7VtaOiIneNaWA84kOB
 CFrO1Lvz9e55Q2lntM9atK28vlnchTCumZyunRYzuL+xGa+jwkLd5CniHY7M2waA
 AymgszDpK51rtAllrAB5BQ4ZtJHLwzsLHlyHI6Qo9+aXj6aIOQVWg39E3K6jj9kp
 Br9Gct7CJFO8fHun0BVTzpuEQlTny/ovuiqFv0IpFuULuXe1TuvJ+/T6TVcwLdxc
 OtzBHRbvSkZyYRpZ2t051OLPf5seVzFzgF2IT8xkE0ucBBsRpgz0WUCPFDcoVhY0
 codwC3fNe5aw6ZapOTNe/0DAnBB2h+WHb2gjl7yjP7fXywQvsvFR7GGjixvtIam9
 cJFxzR52ZknyiizhCntZ8IrLuiYEm1DfbEXNTWW7J6RduIhf7Ehegqv3W0LwCjOF
 /4A/MmLcF3Vs+R1RIgImKQEFRVDvYrqQBzeVTFS/FUbegYCGEG3x72jpBk9FjZzW
 nfV+TIuFYqUUM0gdRTn2
 =3B0d
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/aurel/tags/pull-sh4-next-20150913' into staging

sh4-next:

- TCG optimizations
- fix initramfs endianness issue

# gpg: Signature made Sun 13 Sep 2015 22:16:12 BST using RSA key ID 1DDD8C9B
# gpg: Good signature from "Aurelien Jarno <aurelien@aurel32.net>"
# gpg:                 aka "Aurelien Jarno <aurelien@jarno.fr>"
# gpg:                 aka "Aurelien Jarno <aurel32@debian.org>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7746 2642 A9EF 94FD 0F77  196D BA9C 7806 1DDD 8C9B

* remotes/aurel/tags/pull-sh4-next-20150913:
  sh4: Fix initramfs initialization for endiannes-mismatched targets
  target-sh4: improve shad instruction
  target-sh4: improve shld instruction
  target-sh4: improve cmp/str instruction
  target-sh4: use deposit in swap.b instruction
  target-sh4: add flags markups for FP helpers

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 10:46:38 +01:00
Guenter Roeck
cdd14a8cf2 sh4: Fix initramfs initialization for endiannes-mismatched targets
If host and target endianness does not match, loding an initramfs does not work.
Fix by writing boot parameters with appropriate endianness conversion.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2015-09-13 23:08:51 +02:00
Aurelien Jarno
be654c8360 target-sh4: improve shad instruction
The SH4 shad instruction can shift in both direction, depending on the
sign of the shift. This is currently implemented using branches, which
is not really efficient and prevents the optimizer to do its job. In
practice it is often used with a constant loaded in a register just
before.

Simplify the implementation by computing both the value shifted to the
left and to the right, and then selecting the correct one with a
movcond. As with a negative value the shift amount can go up to 32 which
is undefined, we shift the value in two steps.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2015-09-13 23:08:51 +02:00
Aurelien Jarno
577601616d target-sh4: improve shld instruction
The SH4 shld instruction can shift in both direction, depending on the
sign of the shift. This is currently implemented using branches, which
is not really efficient and prevents the optimizer to do its job. In
practice it is often used with a constant loaded in a register just
before.

Simplify the implementation by computing both the value shifted to the
left and to the right, and then selecting the correct one with a
movcond. As with a negative value the shift amount can go up to 32 which
is undefined, we shift the value in two steps.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2015-09-13 23:08:51 +02:00
Aurelien Jarno
eb6ca2b4a6 target-sh4: improve cmp/str instruction
Instead of testing bytes one by one, we can use the following trick
from https://graphics.stanford.edu/~seander/bithacks.html:

  haszero(v) = (v - 0x01010101) & ~v & 0x80808080

The subexpression v - 0x01010101, evaluates to a high bit set in any
byte whenever the corresponding byte in v is zero or greater than 0x80.
The sub-expression ~v & 0x80808080 evaluates to high bits set in bytes
where the byte of v doesn't have its high bit set (so the byte was less
than 0x80). Finally, by ANDing these two sub-expressions the result is
the high bits set where the bytes in v were zero, since the high bits
set due to a value greater than 0x80 in the first sub-expression are
masked off by the second.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2015-09-13 23:08:51 +02:00
Aurelien Jarno
218fd7301f target-sh4: use deposit in swap.b instruction
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2015-09-13 23:08:51 +02:00
Aurelien Jarno
7f6bdc431a target-sh4: add flags markups for FP helpers
Most floating point helpers can trigger an exception, but don't change
the globals. Mark these helpers as TCG_CALL_NO_WG.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2015-09-13 23:08:51 +02:00
Peter Maydell
8f6e82e4ec queued tcg related patches
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJV8vBsAAoJEK0ScMxN0CebYTcIAMaKhlMb+s7fS5JLrL9f2YR0
 XHwxcbDkRipC57uNT3QOKbX5qruq1iEqKTzcUGaT9Ef6+JMOqA8l9WGMMbrjZrtE
 SRSYI74NcH1U4fWd8uscDBmxj9CIvNG+pxbABDw7IV2wpNWM9IDl1OHtnXp2McJ0
 hGLhtigoEbinFopiQ0R+4R82OpiSB+22w0MlOFQbROSgqnkaY4+5lfPaAGXZEGSn
 8BSZiX4C3kyZXsIbEMKLcVrujtOCFi9dvuW2ZGvt0adYX954vcf/bfpWacS3tXb/
 8AO4W60oNar8vmQFea3bBu4DHfQgsB9dsSvBSFNFdscEjeJHFZrwKSHB92SMRqk=
 =1Oga
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150911' into staging

queued tcg related patches

# gpg: Signature made Fri 11 Sep 2015 16:17:00 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"

* remotes/rth/tags/pull-tcg-20150911:
  cpu-exec: introduce loop exit with restore function
  softmmu: remove now unused functions
  softmmu: add helper function to pass through retaddr
  tlb: Add "ifetch" argument to cpu_mmu_index()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-11 18:01:56 +01:00
Peter Maydell
30c38c90bd scripts/qemu-gdb: Add brief comment describing usage
Add a brief comment describing how to use the debug support
from GDB.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1439574392-4403-5-git-send-email-peter.maydell@linaro.org
2015-09-11 17:14:50 +01:00
Peter Maydell
5e3c72d41e scripts/qemu-gdb: Silently pass through SIGUSR1
SIGUSR1 is QEMU's IPI signal, and it gets sent a lot, so is
best silently passed through to the guest without stopping.
Make qemu-gdb.py do this bit of configuration for the user.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1439574392-4403-4-git-send-email-peter.maydell@linaro.org
2015-09-11 17:14:50 +01:00
Peter Maydell
191590f09d scripts/qemu-gdb: Split CoroutineCommand into its own file
Split the implementation of CoroutineCommand into its own file.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1439574392-4403-3-git-send-email-peter.maydell@linaro.org
2015-09-11 17:14:49 +01:00
Peter Maydell
93b1b365dc scripts/qemu-gdb: Split MtreeCommand into its own module
As we add more commands to our Python gdb debugging support, it's
going to get unwieldy to have everything in a single file. Split
the implementation of the 'mtree' command from qemu-gdb.py into
its own module.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 1439574392-4403-2-git-send-email-peter.maydell@linaro.org
2015-09-11 17:14:49 +01:00
Pavel Dovgalyuk
1c3c8af1fb cpu-exec: introduce loop exit with restore function
This patch introduces loop exit function, which also
restores guest CPU state according to the value of host
program counter.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Message-Id: <20150710095702.13280.97477.stgit@PASHA-ISP>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11 08:16:16 -07:00
Pavel Dovgalyuk
b8611499b9 softmmu: remove now unused functions
Now that the cpu_ld/st_* function directly call helper_ret_ld/st, we can
drop the old helper_ld/st functions.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Message-Id: <20150710095656.13280.7085.stgit@PASHA-ISP>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11 08:16:05 -07:00
Pavel Dovgalyuk
282dffc8a4 softmmu: add helper function to pass through retaddr
This patch introduces several helpers to pass return address
which points to the TB. Correct return address allows correct
restoring of the guest PC and icount. These functions should be used when
helpers embedded into TB invoke memory operations.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Message-Id: <20150710095650.13280.32255.stgit@PASHA-ISP>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11 08:15:32 -07:00
Benjamin Herrenschmidt
97ed5ccdee tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch
translation.

The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.

All targets ignore it for now, and all other callers pass "false".

This will allow targets who wish to split the mmu index between
instruction and data accesses to do so. A subsequent patch will
do just that for PowerPC.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11 08:15:28 -07:00
Peter Maydell
ba9cef7b6e trivial patches for 2015-09-11
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJV8rTTAAoJEL7lnXSkw9fb32oIAJMjOm8SjmMM1HPBMrsuQHBN
 0uaZ0SZvx9mAcs4NNBDVq/ZvOwVjKoWcgPHjJh7rC4SCkN+2O3R/Sv2AgohpIr6z
 cIlr+E9B5V1glTpsqLO6lZBLVYC5NFUXXZKV8jDQM4Orx4b5/cp76TtywE5QDDUZ
 yKXQlzsZGosuxlvueHupXRH1OO3EglLlbywvVxv2HoeC7uepZZ0kpVLtZsnDnqvT
 TpmSregx98TRIutEW2g0rwG0bEpzCW3WafDddhOR/29WCK7P/jJELbMEWlADx4sV
 6SbL5qqSvrs1MpVXyFZY7OE+jrlOmplm4EYjsnjGODS1uk+QA/Y8YzvmBcPnODQ=
 =d3Hy
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-09-11' into staging

trivial patches for 2015-09-11

# gpg: Signature made Fri 11 Sep 2015 12:02:43 BST using RSA key ID A4C3D7DB
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
# gpg:                 aka "Michael Tokarev <mjt@debian.org>"

* remotes/mjt/tags/pull-trivial-patches-2015-09-11: (26 commits)
  virtio-vga: enable for i386
  hw/arm/spitz: Remove meaningless blank Property
  hw/gpio/zaurus: Remove meaningless blank Property
  hw/virtio/virtio-pci: Remove meaningless blank Property
  hw/s390x/s390-virtio-bus: Remove meaningless blank Property
  typofixes - v4
  qapi-schema: remove legacy<> from doc
  disas/microblaze: Remove unused code
  help: dd missing newline
  Target-ppc: Remove unnecessary variable
  baum: Fix build with debugging enabled
  linux-user: Fix warnings caused by missing 'static' attribute
  opts: produce valid command line in qemu_opts_print
  docs: fix a qga/qapi-schema.json comment
  trivial: remove trailing newline from error_report
  maint: avoid useless "if (foo) free(foo)" pattern
  maint: avoid useless "if (foo) free(foo)" pattern
  maint: remove unused include for strings.h
  maint: remove unused include for signal.h
  maint: remove unused include for dirent.h
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-11 12:07:29 +01:00
Gerd Hoffmann
af5b83d7d5 virtio-vga: enable for i386
This one just syncs x86_64 and i386.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-trivial@nongnu.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 12:18:37 +03:00
Shannon Zhao
a3c088a72c hw/arm/spitz: Remove meaningless blank Property
Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 11:04:31 +03:00
Shannon Zhao
c11b05836e hw/gpio/zaurus: Remove meaningless blank Property
Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 11:04:03 +03:00
Shannon Zhao
6328d69de0 hw/virtio/virtio-pci: Remove meaningless blank Property
Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 11:03:42 +03:00
Shannon Zhao
01630e24b0 hw/s390x/s390-virtio-bus: Remove meaningless blank Property
Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:59:47 +03:00
Veres Lajos
67cc32ebfd typofixes - v4
Signed-off-by: Veres Lajos <vlajos@gmail.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:45:43 +03:00
Marc-André Lureau
33b23b4b5e qapi-schema: remove legacy<> from doc
The legacy<> type is no longer used since 7ce7ffe02.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:21:39 +03:00
Stefan Weil
76621d1faa disas/microblaze: Remove unused code
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:21:38 +03:00
Laurent Vivier
2382053f1d help: dd missing newline
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:21:38 +03:00
Shraddha Barke
74c373e42f Target-ppc: Remove unnecessary variable
Compress lines and remove the variable ret.

Change made using Coccinelle script

@@
expression ret;
@@
- if (ret) return ret;
- return 0;
+ return ret;
@@
local idexpression ret;
expression e;
@@
- ret = e;
- return ret;
+ return e;
@@
type T; identifier i;
@@
- T i;
... when != i

Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:21:38 +03:00
Samuel Thibault
70cbae1dd8 baum: Fix build with debugging enabled
cur and buf are pointers, so the difference is a ptrdiff_t

Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:21:38 +03:00
Stefan Weil
8cb7675561 linux-user: Fix warnings caused by missing 'static' attribute
Warnings from the Sparse static analysis tool:

linux-user/main.c:40:12: warning:
 symbol 'filename' was not declared. Should it be static?
linux-user/main.c:41:12: warning:
 symbol 'argv0' was not declared. Should it be static?
linux-user/main.c:42:5: warning:
 symbol 'gdbstub_port' was not declared. Should it be static?
linux-user/main.c:43:11: warning:
 symbol 'envlist' was not declared. Should it be static?

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:21:38 +03:00
Kővágó, Zoltán
fe646693ac opts: produce valid command line in qemu_opts_print
This will let us print options in a format that the user would actually
write it on the command line (foo=bar,baz=asd,etc=def), without
prepending a spurious comma at the beginning of the list, or quoting
values unnecessarily.  This patch provides the following changes:
* write and id=, if the option has an id
* do not print separator before the first element
* do not quote string arguments
* properly escape commas (,) for QEMU

Signed-off-by: Kővágó, Zoltán <DirtY.iCE.hu@gmail.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:21:38 +03:00