Commit Graph

126 Commits

Author SHA1 Message Date
Richard Henderson
87d98f9551 target-alpha: Expand zap/zapnot with immediate inline.
The vast majority of zap instructions have an immediate operand,
since zapnot is the canonical method to zero-extend from u16 or u32.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson
806991da3a target-alpha: Fix -d in_asm
Generic disassembly was incorrectly keyed on ALPHA_DEBUG_DISAS
rather than the generic DEBUG_DISAS.  Use qemu_log_mask for
additional LOG_DISAS output.  Delete some random insn_count
logging noise from gen_intermediate_code_internal.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson
13e4df99ce target-alpha: Implement missing MVI instructions.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson
a964acc6bf target-alpha: Honor the -cpu command line argument.
Also change the default cpu to ev67.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 20:32:36 +01:00
Richard Henderson
19188121b4 target-alpha: Remove bogus DO_TB_FLUSH code from translator.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 20:32:36 +01:00
Vince Weaver
dbf9580588 target-alpha: fix extlh instruction
The extlh instruction on Alpha currently doesn't work properly.
It's a combination of a cut/paste bug (16 where it should be 32) as well
as a "shift by 64" bug.

Signed-off-by: Vince Weaver <vince@csl.cornell.edu>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-18 17:22:37 +02:00
Blue Swirl
72cf2d4f0e Fix sys-queue.h conflict for good
Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc923584,
f40d753718,
96555a96d7 and
3990d09adf but the fixes were fragile.

Solution: Avoid the conflict entirely by renaming the functions and the
file. Revert the previous hacks.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-12 07:36:22 +00:00
Blue Swirl
636aa20056 Replace always_inline with inline
We define inline as always_inline.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-16 09:06:54 +00:00
Blue Swirl
8167ee8839 Update to a hopefully more future proof FSF address
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 20:47:01 +00:00
aliguori
0bf46a40a1 qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24 18:03:41 +00:00
aurel32
ffc500ea02 target-alpha: fix emulation of ecb
As ECB is a hint, it can be safely emulated as a nop.

This change is necessary to boot Tru64.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7111 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-15 14:43:11 +00:00
aurel32
1a1f7dbcf1 target-alpha: remove amask helper
The direct use of helper_amask in translate.c was bogus (as env is not
assigned).  Directly code amask in tcg and remove the helper.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7075 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-10 21:27:48 +00:00
aurel32
8579095b81 target-alpha: remove helper_load_implver
There is no need to use an helper.  Directly load the value with tcg code.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7074 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-10 21:27:31 +00:00
aurel32
31a877f201 target-alpha: fix palcode mask for user pal calls
(Also 6 bits for unprivileged calls)

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7033 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-07 22:31:34 +00:00
aurel32
8fcc55f9de target-alpha: stop translation if too long
Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7027 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-07 21:44:52 +00:00
aurel32
1b530a6dfc Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05 20:08:59 +00:00
aurel32
ed1dda53d0 target-alpha: bug fix: avoid nop to override next instruction
While searching PC, always store the pc of a new instruction.
Instructions that didn't generate tcg code (such as nop) prevented the next
one to be referenced.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6930 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29 01:04:39 +00:00
aurel32
b5d5102904 target-alpha: add instruction name in comments for hw_ld opcode.
Make code slightly easier to read.
Also unused hw_ld opcodes now generate an invalid opc fault.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6928 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29 00:22:01 +00:00
aurel32
45d46ce8d9 target-alpha: fix temp free for hw_st
No need to stop translation after hw_st.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6925 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29 00:14:06 +00:00
aurel32
a151674462 target-alpha: fix bug: integer conditional branch offset is 21 bits wide.
Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6924 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29 00:13:56 +00:00
aurel32
577d5e7fe2 target-alpha: Fix bug: do not mask address LSBs for ldwu.
Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6923 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29 00:13:47 +00:00
aurel32
e79ab94150 target-alpha: Fix bug: palcode is at least 6 bits.
Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6922 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29 00:13:38 +00:00
aliguori
0d0266a53b targets: remove error handling from qemu_malloc() callers (Avi Kivity)
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-05 22:06:11 +00:00
aliguori
8fec2b8c45 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:36:53 +00:00
aliguori
93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:34:14 +00:00
aliguori
d12d51d5ba Clean up debugging code #ifdefs (Eduardo Habkost)
Use macros to avoid #ifdefs on debugging code.

This patch doesn't try to merge logging macros from different files,
but just unify the debugging code #ifdefs onto a macro on each file. A
further cleanup can unify the debugging macros on a common header, later

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6332 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 21:48:06 +00:00
aurel32
fad6cb1a56 Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04 22:05:52 +00:00
aurel32
19bf517b7f target-alpha: gdb-stub support
(Vince Weaver)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5945 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 23:26:32 +00:00
aliguori
c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
aliguori
a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka)
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
pbrook
a7812ae412 TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
aurel32
a74b4d2c23 target-alpha: fix decoding of CVTST /S
This patch fixes the decoding of CVTST /S which was
incorrectly being decoded as CVTTS.

This fixes SPEC2000 gcc with 200.i input.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5693 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:54:54 +00:00
aurel32
55489a1739 target-alpha: disable single stepping and TB flush by default
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5690 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:31:10 +00:00
aurel32
9cd38c2372 target-alpha: fix double TCG variable allocation
Noticed by Chris Krumme.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5671 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:30:04 +00:00
aurel32
6223246ad9 target-alpha: fix the return value of stl_c/stq_c
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5649 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-08 09:10:39 +00:00
aurel32
57a92c8e36 target-alpha: fix locked loads/stores
Fix reading of cpu_lock in gen_qemu_stql_c, original patch from Laurent
Desnogues.

A new flag was added to gen_store_mem to allocate local temps instead
of temps;  this flag should be set when the tcg_gen_qemu_store callback
uses brcond before using the temps or else liveness analysis will get
rid of the temps.

This also adds lock printing in cpu_dump_state which can help
debug.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5645 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-07 14:00:24 +00:00
aurel32
1304ca878a target-alpha: Fix ret instruction
Hopefully pine doesn't corrupt this patch, I've had problems recently.

For an alpha "ret" instruction, of the type
     ret $26

The return was being ignored.  This is because in translate.c
register $26 (the return address) was being over-written with the current
PC before it could be jumped to.  Thus the ret was ignored.

This patch just re-orders things so the return address is processed before
it is over-written with the current PC.

(Vince Weaver)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5638 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-06 09:16:57 +00:00
aurel32
1b581c440b target-alpha: use the new TCG logical operations
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5502 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-21 11:29:11 +00:00
aurel32
8bb6e981e0 target-alpha: convert palcode ops to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5360 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-30 06:45:44 +00:00
aurel32
f4ed86794c target-alpha: convert locked load/store to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5359 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-30 06:45:34 +00:00
aurel32
fe2b269a4f target-alpha: misc fixes
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5355 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29 17:21:37 +00:00
aurel32
f18cd2238d target-alpha: convert FP ops to TCG
- Convert FP ops to TCG
- Fix S format
- Implement F and G formats (untested)
- Fix MF_FPCR an MT_FPCR
- Fix FTOIS, FTOIT, ITOFF, ITOFS, ITOFT
- Fix CPYSN, CPYSE

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5354 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29 17:21:28 +00:00
aurel32
023d8ca21f target-alpha: factorize load/store code
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5353 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29 17:21:17 +00:00
aurel32
b03d0971b3 target-alpha: switch most load/store ops to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5255 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 15:31:27 +00:00
aurel32
04acd30726 target-alpha: convert remaining arith3 functions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 13:45:14 +00:00
aurel32
a1cf28f469 target-alpha: fix one more literal sign issue
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5251 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 10:13:19 +00:00
aurel32
dfaa85834f target-alpha: instruction decoding simplification
Use a litteral value of 0 when rb31 is used. This reduces the tests
in the instruction decoding. Also remove almost unused corner cases.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5250 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 10:11:26 +00:00
aurel32
01ff9cc8fe target-alpha: convert cmp* instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5249 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 09:24:25 +00:00
aurel32
adf3c8b6e9 alpha: fix a missing literal sign issue
Reported by Tristan Gingold

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5248 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 09:17:13 +00:00
aurel32
6ad025921c target-alpha: switch a few helpers to TCG
Switch a few helpers to TCG and implement RC and RS instructions

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 00:02:17 +00:00
aurel32
b3249f630e target-alpha: convert byte manipulation instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5246 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-17 22:04:52 +00:00
aurel32
9c29504eb7 alpha: convert cmov and bcond to TCG
Patch mostly by Tristan Gingold

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5245 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-17 22:04:44 +00:00
aurel32
1ef4ef4e64 target-alpha: small optimizations
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5238 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-16 22:44:25 +00:00
aurel32
6ba8dcd773 target-alpha: fix TCG register names
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5237 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-16 22:44:17 +00:00
aurel32
30c7183b67 target-alpha: convert some arith3 instructions to TCG
Replace gen_arith3 generic macro and dyngen ops by instruction specific
optimized TCG code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5236 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-16 22:44:10 +00:00
aurel32
ae8ecd4231 target-alpha: convert arith2 instructions to TCG
Replace gen_arith2 generic macro and dyngon ops by instruction specific
optimized TCG code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5235 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-16 22:44:02 +00:00
aurel32
9e85e9bdcf alpha: fix lit sign
according to the alpha arch reference, the literal field of an operate
instruction is unsigned:

If bit <12> of the instruction is 1, an 8-bit zero-extended literal
constant is formed by bits
<20:13> of the instruction. The l teral is interpreted as a positive
integer bet ween 0 and 255
and is zero-extended to 64 bits.

This patch fixes the mis-interpretation of the literal field.

(Tristan Gingold)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5211 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 16:09:15 +00:00
aurel32
29d26d20e5 fix alpha cmovxx instruction
The CMOV instruction is defined by the alpha manual as:

CMOVxx Ra.rq,Rb.rq,Rc.wq !Operate format
CMOVxx Ra.rq,#b.ib,Rc.wq !Operate format

Operation:
IF TEST(Rav, Condition_based_on_Opcode) THEN
Rc ← Rbv

The current qemu behavior inverses Ra and Rb.  This is fixed by this
patch.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5171 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05 19:07:53 +00:00
aurel32
4f821e1757 alpha: convert a few more instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5152 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 04:36:20 +00:00
aurel32
3761035f2c alpha: directly access ir registers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5151 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 04:36:00 +00:00
aurel32
496cb5b921 convert of few alpha insn to TCG
(based on a patch from Tristan Gingold)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5150 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 04:35:40 +00:00
blueswir1
a5f1b965da Fix warnings that would be generated by gcc -Wstrict-prototypes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 20:21:51 +00:00
ths
2cfc5f17d3 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 18:01:29 +00:00
pbrook
b2437bf267 Add missing static qualifiers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4801 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 12:29:56 +00:00
pbrook
2e70f6efa8 Add instruction counter.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 01:03:05 +00:00
aurel32
d2856f1ad4 Factorize code in translate.c
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:32:32 +00:00
aurel32
ca10f86763 Remove osdep.c/qemu-img code duplication
(Kevin Wolf)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 21:35:42 +00:00
bellard
57fec1fee9 use the TCG code generator
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
j_mayer
f071b4d3ca Alpha coding style and inlining fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3462 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28 00:56:24 +00:00
j_mayer
bb6f6792bf Allow Alpha target to use supervisor and executive mode micro-ops.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3389 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 08:50:17 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ths
ce62e5ba09 Fix tb->size mishandling, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-11 10:04:58 +00:00
ths
08ab123c2d Avoid compiler warning.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2935 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 17:10:43 +00:00
j_mayer
e96efcfcb1 Fix miscellaneous display warnings for PowerPC & alpha targets
and parallel CFI flash driver.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2661 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-14 12:17:09 +00:00
j_mayer
4c9649a967 Alpha architecture emulation core.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2597 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 06:58:33 +00:00