Commit Graph

145 Commits

Author SHA1 Message Date
Peter Crosthwaite
9f87a4cacd disas: QOMify moxie specific disas setup
Move the target_disas() moxie specifics to the CPUClass::disas_set_info()
hook and delete the #ifdef specific code in disas.c.

Cc: Anthony Green <green@moxielogic.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-10-22 15:49:40 +02:00
Peter Crosthwaite
dbad6b74b3 disas: QOMify s390x specific disas setup
Move the target_disas() s390 specifics to the CPUClass::disas_set_info()
hook and delete the #ifdef specific code in disas.c.

Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-10-22 15:49:40 +02:00
Pavel Butsykin
caf15319e8 monitor: make monitor_fprintf and mon_get_cpu externally visible
monitor_fprintf and mon_get_cpu will be used in the target-specific monitor,
so it is advisable to make it external.

Signed-off-by: Pavel Butsykin <pbutsykin@virtuozzo.com>
Signed-off-by: Denis V. Lunev <den@openvz.org>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Andreas Färber <afaerber@suse.de>
Message-Id: <1442927901-1084-6-git-send-email-den@openvz.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-25 12:04:42 +02:00
Peter Crosthwaite
9504c5445c disas: Defeature print_target_address
It does not work in multi-arch as it requires the CPU specific
TARGET_VIRT_ADDR_SPACE_BITS global define. Just use the generic
version that does no masking. Targets should be responsible for
passing in a sane virtual address.

Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-Id: <1436129432-16617-1-git-send-email-crosthwaite.peter@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-08-14 23:40:32 +02:00
Peter Crosthwaite
6b625fde5e disas: cris: QOMify target specific disas setup
Move the target_disas() cris specifics to the QOM disas_set_info() hook
and delete the cris specific code in disas.c.

This also now adds support for monitor_disas() to cris.

E.g.
(qemu) xp 0x40004000
0000000040004000: 0x1e6f25f0

And before this patch:
(qemu) xp/i 0x40004000
0x40004000: Asm output not supported on this arch

After:
(qemu) xp/i 0x40004000
0x40004000:  di
(qemu) xp/i 0x40004002
0x40004002:  move.d 0xb003c004,$r1

Note: second example is 6-byte misaligned instruction!

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09 15:20:41 +02:00
Peter Crosthwaite
efc6674be8 disas: microblaze: QOMify target specific disas setup
Move the target_disas() MB specifics to the QOM disas_set_info hook
and delete the MB specific code in disas.c.

This also now adds support for monitor_disas() to Microblaze.

E.g.
(qemu) xp 0x90000000
0000000090000000: 0x94208001

And before this patch:
(qemu) xp/i 0x90000000
0x90000000: Asm output not supported on this arch

After:
(qemu) xp/i 0x90000000
0x90000000:  mfs    r1, rmsr

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09 15:20:41 +02:00
Peter Crosthwaite
484406200e disas: arm: QOMify target specific disas setup
Move the target_disas() ARM specifics to the QOM disas_set_info hook
and delete the ARM specific code in disas.c.

This has the extra advantage of the more fully featured target_disas()
implementation now applying to monitor_disas().

Currently, target_disas() has multi-endian, thumb and AArch64
support whereas the existing monitor_disas() support only has vanilla
AA32 support.

E.G. Running an AA64 linux kernel the following -d in_asm disas happens
(taget_disas()):

IN:
0x0000000040000000:  580000c0      ldr x0, pc+24 (addr 0x40000018)
0x0000000040000004:  aa1f03e1      mov x1, xzr

However before this patch, disasing the same from the monitor:

(qemu) xp/i 0x40000000
0x0000000040000000:  580000c0      stmdapl  r0, {r6, r7}

After this patch:
(qemu) xp/i 0x40000000
0x0000000040000000:  580000c0      ldr x0, pc+24 (addr 0x40000018)

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09 15:20:41 +02:00
Peter Crosthwaite
37b9de463b disas: QOMify target specific setup
Add a QOM function hook for target-specific disassembly setup. This
allows removal of the #ifdeffery currently implementing target specific
disas setup from disas.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09 15:20:41 +02:00
Peter Crosthwaite
2de295c544 disas: Add print_insn to disassemble info
Add the print_insn pointer to the disassemble info structure. This is
to prepare for QOMification support, where a QOM CPU hook function will
be responsible for setting the print_insn() function. Add this function
to the existing struct to consolidate such that only the one struct
needs to be passed to the new QOM API.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09 15:20:40 +02:00
Peter Crosthwaite
d49190c420 disas: Remove uses of CPU env
disas does not need to access the CPU env for any reason. Change the
APIs to accept CPU pointers instead. Small change pattern needs to be
applied to all target translate.c. This brings us closer to making
disas.o a common-obj and less architecture specific in general.

Cc: Richard Henderson <rth@twiddle.net>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Jia Liu <proljc@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22 17:40:01 +02:00
Tom Musta
1c38f84373 monitor: QEMU Monitor Instruction Disassembly Incorrect for PowerPC LE Mode
The monitor support for disassembling instructions does not honor the MSR[LE]
bit for PowerPC processors.

This change enhances the monitor_disas() routine by supporting a flag bit
for Little Endian mode.  Bit 16 is used since that bit was used in the
analagous guest disassembly routine target_disas().

Also, to be consistent with target_disas(), the disassembler bfd_mach field
can be passed in the flags argument.

Reported-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16 13:24:26 +02:00
Tom Musta
e13951f896 target-ppc: Fix target_disas
Inspect only bit 16 for the Little Endian test.  Correct comment preceding
the target_disas() function.  Correct grammar in comment for flags processing.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-06-16 13:24:26 +02:00
Claudio Fontana
999b53ec87 disas: Implement disassembly output for A64
Use libvixl to implement disassembly output in debug
logs for A64, for use with both AArch64 hosts and targets.

Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
[PMM:
 * added support for target disassembly
 * switched to custom QEMUDisassembler so the output format
   matches what QEMU expects
 * make sure we correctly fall back to "just print hex"
   if we didn't build the AArch64 disassembler because of
   lack of a C++ compiler
 * rename from 'aarch64' to 'arm-a64' because this is a
   disassembler for the A64 instruction set
 * merge aarch64.c and aarch64-cxx.cc into one C++ file
 * simplify the aarch64.c<->aarch64-cxx.cc interface]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08 14:50:48 +00:00
Richard Henderson
c46ffd57a3 disas: Implement fallback to dump object code as hex
The OBJD-[HT] tags will be used by a script to run the hex blob
through objdump --disassemble.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-08-24 07:26:45 +02:00
Andreas Färber
f17ec444c3 exec: Change cpu_memory_rw_debug() argument to CPUState
Propagate X86CPU in kvmvapic for simplicity.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23 02:41:33 +02:00
Aurelien Jarno
88770fec6c disas: Disassemble all ppc insns for the guest
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-26 23:02:42 +02:00
Richard Henderson
66d4f6a32b disas: Disassemble all ppc insns for the host
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-15 19:44:35 +02:00
Anthony Green
bd86a88eed Add moxie disassembler
Signed-off-by: Anthony Green <green@moxielogic.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-23 14:25:41 +00:00
Paolo Bonzini
83c9089e73 monitor: move include files to include/monitor/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:31:32 +01:00
Paolo Bonzini
76cad71136 build: kill libdis, move disassemblers to disas/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:29:06 +01:00
Blue Swirl
f4359b9ffe disas: avoid using cpu_single_env
Pass around CPUArchState instead of using global cpu_single_env.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-11-10 13:49:20 +00:00
Richard Henderson
9b9c37c364 tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.
Current code doesn't actually work in 32-bit mode at all.  Since
no one really noticed, drop the complication of v7 and v8 cpus.
Eliminate the --sparc_cpu configure option and standardize macro
testing on TCG_TARGET_REG_BITS / HOST_LONG_BITS

Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21 22:02:16 +02:00
Peter Maydell
636bd28939 disas: Fix printing of addresses in disassembly
In our disassembly code, the bfd_vma type is always 64 bits,
even if the target's virtual address width is only 32 bits. This
means that when we print out addresses we need to truncate them
to 32 bits, to avoid odd output which has incorrectly sign-extended
a value to 64 bits, for instance this ARM example:
    0x80479a60:  e59f4088     ldr  r4, [pc, #136]  ; 0xffffffff80479a4f

(It would also be possible to truncate before passing the address
to info->print_address_func(), but truncating in the final print
function is the same approach that binutils takes to this problem.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-14 10:32:34 +00:00
Jim Meyering
a31f053129 fix some common typos
These were identified using: http://github.com/lyda/misspell-check
and run like this to create a bourne shell script using GNU sed's
-i option:

git ls-files|grep -vF .bin | misspellings -f - |grep -v '^ERROR:' |perl \
-pe 's/^(.*?)\[(\d+)\]: (\w+) -> "(.*?)"$/sed -i '\''${2}s!$3!$4!'\'' $1/'

Manually eliding the FP, "rela->real" and resolving "addres" to
address (not "adders") we get this:

  sed -i '450s!thru!through!' Changelog
  sed -i '260s!neccessary!necessary!' coroutine-sigaltstack.c
  sed -i '54s!miniscule!minuscule!' disas.c
  sed -i '1094s!thru!through!' hw/usb/hcd-ehci.c
  sed -i '1095s!thru!through!' hw/usb/hcd-ehci.c
  sed -i '21s!unecessary!unnecessary!' qapi-schema-guest.json
  sed -i '307s!explictly!explicitly!' qemu-ga.c
  sed -i '490s!preceeding!preceding!' qga/commands-posix.c
  sed -i '792s!addres!address!' qga/commands-posix.c
  sed -i '6s!beeing!being!' tests/tcg/test-mmap.c

Also, manually fix "arithmentic", spotted by Peter Maydell:

  sed -i 's!arithmentic!arithmetic!' coroutine-sigaltstack.c

Signed-off-by: Jim Meyering <meyering@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-14 07:27:24 +02:00
Stefan Weil
b0b0f1c964 disas: Replace 'unsigned long' by 'uintptr_t'
This is needed for w64. It changes nothing for other hosts.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-04-15 21:25:18 +02:00
Paul Brook
d8fd295499 Userspace ARM BE8 support
Add support for ARM BE8 userspace binaries.
i.e. big-endian data and little-endian code.
In principle LE8 mode is also possible, but AFAIK has never actually
been implemented/used.

System emulation doesn't have any useable big-endian board models,
but should in principle work once you fix that.
Dynamic endianness switching requires messing with data accesses,
preferably with TCG cooperation, and is orthogonal to BE8 support.

Signed-off-by: Paul Brook <paul@codesourcery.com>
[PMM: various changes, mostly as per my suggestions in code review:
 * rebase
 * use EF_ defines rather than hardcoded constants
 * make bswap_code a bool for future VMSTATE macro compatibility
 * update comment in cpu.h about TB flags bit field usage
 * factor out load-code-and-swap into arm_ld*_code functions and
   get_user_code* macros
 * fix stray trailing space at end of line
 * added braces in disas.c to satisfy checkpatch
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-04-06 19:25:57 +03:00
Michael Walle
79368f4984 target-lm32: add simple disassembler
Because binutils disassembler is based on libopcode, this is a rewrite from
scratch.

Signed-off-by: Michael Walle <michael@walle.cc>
2012-04-01 20:30:23 +02:00
Andreas Färber
9349b4f9fd Rename CPUState -> CPUArchState
Scripted conversion:
  for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
    sed -i "s/CPUState/CPUArchState/g" $file
  done

All occurrences of CPUArchState are expected to be replaced by QOM CPUState,
once all targets are QOM'ified and common fields have been extracted.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:27 +01:00
Stefan Weil
5826e51917 tcg: Add tci disassembler
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-31 21:52:17 +01:00
Frediano Ziglio
e99722f66a disasm: update comment
Signed-off-by: Frediano Ziglio <freddy77@gmail.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-08-25 09:21:48 +01:00
Blue Swirl
2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Richard Henderson
b9bec751c8 target-alpha: Disassemble EV6 PALcode instructions.
The QEMU emulation PALcode will use EV6 PALcode insns regardless
of the "real" cpu instruction set being emulated.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:04 -07:00
Stefan Weil
54f7b4a396 Replace cpu_physical_memory_rw were possible
Using cpu_physical_memory_read, cpu_physical_memory_write and ldub_phys
improves readability and allows removing some type casts.

lduw_phys and ldl_phys were not used because both require aligned
addresses. Therefore it is not possible to simply replace existing
calls by one of these functions.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12 21:51:50 +02:00
Ulrich Hecht
db50060984 s390x: Enable disassembler for s390x
This patch enables the instruction disassembler when using an
S390x target.

Signed-off-by: Ulrich Hecht <uli@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-04 00:34:11 +02:00
Aurelien Jarno
0f136d9e06 disas: remove opcode printing on ARM hosts
Following commit 5d48e9174e, it's possible
to remove the hack that used to display the opcodes on ARM hosts only.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-12 15:12:58 +01:00
Edgar E. Iglesias
b09cd072df cris: Support disassembly of crisv10
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2011-01-10 22:31:09 +01:00
Stefan Weil
8b7968f7c4 Use GCC_FMT_ATTR (format checking)
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-10-03 06:34:51 +00:00
Aurelien Jarno
903ec55cc0 ia64 disas support
Taken from binutils SVN, using last GPLv2 version.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Magnus Damm
b4e1f07747 sh4 disasm fixes
Add the sh4 target to the monitor disassembly function,
and remove a duplicate "0x" printout from the sh4 dis-
assembly code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-14 01:19:12 +01:00
Juan Quintela
e2542fe2bc rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27 14:09:21 -05:00
Edgar E. Iglesias
e90e390c2b microblaze: Add disassembler.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-05-26 21:10:28 +02:00
Blue Swirl
e612a1f725 Fix disassembler memory accesses
Sparc disassembler wants to check previous addresses for some stuff
and this may actually cause faults to be generated to the guest if the
address is close to page start, because of the function used for the
memory access.

Fix by changing ldub_code to cpu_memory_rw_debug, which doesn't trigger
exceptions.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-07 17:14:07 +00:00
malc
754d00ae3a Safety net for the cases where disassembler/translator disagree over instruction decoding
Noticed by Mark Karpeles.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7209 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-21 22:26:22 +00:00
aliguori
376253ece4 monitor: Rework API (Jan Kiszka)
Refactor the monitor API and prepare it for decoupled terminals:
term_print functions are renamed to monitor_* and all monitor services
gain a new parameter (mon) that will once refer to the monitor instance
the output is supposed to appear on. However, the argument remains
unused for now. All monitor command callbacks are also extended by a mon
parameter so that command handlers are able to pass an appropriate
reference to monitor output services.

For the case that monitor outputs so far happen without clearly
identifiable context, the global variable cur_mon is introduced that
shall once provide a pointer either to the current active monitor (while
processing commands) or to the default one. On the mid or long term,
those use case will be obsoleted so that this variable can be removed
again.

Due to the broad usage of the monitor interface, this patch mostly deals
with converting users of the monitor API. A few of them are already
extended to pass 'mon' from the command handler further down to internal
functions that invoke monitor_printf.

At this chance, monitor-related prototypes are moved from console.h to
a new monitor.h. The same is done for the readline API.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6711 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-05 23:01:23 +00:00
blueswir1
7e000c2e3d Allow disassembling last addresses of the address space
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6619 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-13 21:44:41 +00:00
malc
e58ffeb322 Remove all traces of __powerpc__
According to $GCC/gcc/config/rs6000/rs6000-c.c _ARCH_PPC is the
ubiquitous define which should be used to test whether gcc targets
PowerPC, on 64bit platforms _ARCH_PPC64 will be also defined.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6301 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14 18:39:49 +00:00
pbrook
3a742b7643 Update old fashioned function prototypes.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5511 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22 15:55:18 +00:00
pbrook
49918a752b * Use function pointers for symbol lookup (currently for elf32 and elf64,
could be expanded).  This also fixes the bug with mips elf64 symbols
  in current Qemu trunk.

* Use quicksort and binary search for symbol lookup.

* Remove unneeded entries from symbol table.  This reduced a typical table
  size (linux mips kernel) from 1764487 to 11656 entries.

Signed-off-by: Stefan Weil <weil@mail.berlios.de> 



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5510 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22 15:11:31 +00:00
blueswir1
a5f1b965da Fix warnings that would be generated by gcc -Wstrict-prototypes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 20:21:51 +00:00
aurel32
f54b3f920f HPPA (PA-RISC) host support
(Stuart Brady)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-12 20:14:54 +00:00
ths
cbd669dae9 One more bit of alpha support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3854 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25 00:26:36 +00:00
ths
a25fd137c3 Wire up CRIS disassembler, by Edgar E. Iglesias.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3357 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 12:46:58 +00:00
j_mayer
237c0af017 Define the proper bfd_mach to be used by the disassembler for each
PowerPC emulated CPU.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3257 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29 12:01:46 +00:00
ths
3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17 08:09:54 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ths
8f860bb83c s390 disassembler support, by Ulrich Hecht.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3104 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-31 23:44:21 +00:00
ths
a8fcf883d9 One day we might support MIPS16...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2939 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 19:16:42 +00:00
ths
e91c8a7783 Spelling fixes, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2927 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 13:35:16 +00:00
blueswir1
682c4f1559 Fix monitor disasm output for Sparc64 target
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2646 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 15:14:57 +00:00
blueswir1
6ecd453484 Fix generated code disasm output on Sparc64 host
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2638 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-08 11:22:29 +00:00
j_mayer
eddf68a6ac Integrate Alpha target in Qemu core.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2601 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 07:22:49 +00:00
pbrook
04e897efdd Remove duplicate TARGET_M68K case.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2280 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-01 14:14:34 +00:00
pbrook
e6e5906b6e ColdFire target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-22 00:18:54 +00:00
pbrook
4615218210 Rewrite Arm host support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2071 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-30 19:16:29 +00:00
bellard
26a76461f2 C99 64 bit printf
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25 18:15:32 +00:00
bellard
fdf9b3e831 sh4 target (Samuel Tardieu)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1861 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-27 21:07:38 +00:00
bellard
76b3030c56 mipsel disas fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1705 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-17 01:10:04 +00:00
bellard
6a00d60127 SMP support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1640 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-21 23:25:50 +00:00
bellard
48024e4a48 m68k disassembler (Paul Brook)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1605 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-06 16:52:11 +00:00
bellard
b3ecf620de Thumb symbol lookup (Paul Brook)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1581 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 18:21:23 +00:00
bellard
a2458627f9 ppc64 target
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1523 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-23 22:39:53 +00:00
bellard
6af0bf9c7c MIPS target (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1464 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 14:58:51 +00:00
bellard
3475187dd8 sparc64 marge (Blue Swirl)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1462 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 14:31:34 +00:00
bellard
c2d551ff5a ARM thumb disassembly (Paul Brook)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1416 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-27 20:15:00 +00:00
bellard
111bfab3b5 This patch adds little-endian mode support to PPC emulation.
This is needed by OS/2 and Windows NT and some programs like VirtualPC.
This patch has been tested using OS/2 bootloader (thanks to Tero
Kaarlela).
(Jocelyn Mayer)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1379 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-23 18:16:07 +00:00
bellard
b8076a748d ia64 host support (David Mosberger)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1360 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-07 22:20:31 +00:00
bellard
fa15e030bf 64 bit disas fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1260 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-31 23:32:31 +00:00
bellard
83b34f8b57 more consistent type for size (still a bug in wrapping)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1230 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-23 20:26:30 +00:00
bellard
c27004ec78 64 bit target support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1189 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-03 23:35:10 +00:00
bellard
e80cfcfc88 SPARC merge
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1179 c046a42c-6fe2-441c-8c8c-71466251a162
2004-12-19 23:18:01 +00:00
bellard
7fe48483cd monitor fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1110 c046a42c-6fe2-441c-8c8c-71466251a162
2004-10-09 18:08:01 +00:00
bellard
3d2cfdf169 output disassembled code to monitor console
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1033 c046a42c-6fe2-441c-8c8c-71466251a162
2004-08-01 21:49:07 +00:00
bellard
9307c4c1d9 improved monitor: type check, expression evaluator, memory dump, disassembly
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@703 c046a42c-6fe2-441c-8c8c-71466251a162
2004-04-04 12:57:25 +00:00
bellard
bc51c5c989 initial x86-64 host support (Gwenole Beauchesne)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@670 c046a42c-6fe2-441c-8c8c-71466251a162
2004-03-17 23:46:04 +00:00
bellard
678673089d PowerPC target support (Jocelyn Mayer) - added better support for uid16
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@474 c046a42c-6fe2-441c-8c8c-71466251a162
2003-11-23 17:05:30 +00:00
bellard
baf8ebf01a fixed virtual memory access
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@416 c046a42c-6fe2-441c-8c8c-71466251a162
2003-10-27 23:57:40 +00:00
bellard
c6105c0a04 added correct memory access code for system emulation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@407 c046a42c-6fe2-441c-8c8c-71466251a162
2003-10-27 21:13:58 +00:00
bellard
93ac68bca5 sparc emulation target (thanx to Thomas M. Ogrisegg)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@388 c046a42c-6fe2-441c-8c8c-71466251a162
2003-09-30 20:57:29 +00:00
bellard
d44b29c21e address printing fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@324 c046a42c-6fe2-441c-8c8c-71466251a162
2003-07-13 17:29:55 +00:00
bellard
95cbfc643d changed disas() prototype for multi target support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@233 c046a42c-6fe2-441c-8c8c-71466251a162
2003-06-15 19:44:10 +00:00
bellard
5bbe92995c disas endian fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@227 c046a42c-6fe2-441c-8c8c-71466251a162
2003-06-09 19:38:38 +00:00
bellard
aa0aa4fa31 added ARM and Sparc disassemblers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@214 c046a42c-6fe2-441c-8c8c-71466251a162
2003-06-09 15:23:31 +00:00
bellard
08351fb37a fixed cast
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@182 c046a42c-6fe2-441c-8c8c-71466251a162
2003-05-25 16:42:20 +00:00
bellard
a993ba85cf alpha disas (Falk Hueffner)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@155 c046a42c-6fe2-441c-8c8c-71466251a162
2003-05-11 12:25:45 +00:00
bellard
b9adb4a6bc PowerPC disas code
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@107 c046a42c-6fe2-441c-8c8c-71466251a162
2003-04-29 20:41:16 +00:00