Commit Graph

93188 Commits

Author SHA1 Message Date
John Snow
366d33158c python: update type hints for mypy 0.930
Mypy 0.930, released Dec 22, changes the way argparse objects are
considered. Crafting a definition that works under Python 3.6 and an
older mypy alongside newer versions simultaneously is ... difficult,
so... eh. Stub it out with an 'Any' definition to get the CI moving
again.

Oh well.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Beraldo Leal <bleal@redhat.com>
Message-id: 20220110191349.1841027-4-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2022-01-10 18:22:59 -05:00
John Snow
42d73f2894 Python/aqmp: fix type definitions for mypy 0.920
0.920 (Released 2021-12-15) is not entirely happy with the
way that I was defining _FutureT:

qemu/aqmp/protocol.py:601: error: Item "object" of the upper bound
"Optional[Future[Any]]" of type variable "_FutureT" has no attribute
"done"

Update it with something a little mechanically simpler that works better
across a wider array of mypy versions.

Signed-off-by: John Snow <jsnow@redhat.com>
Message-id: 20220110191349.1841027-3-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2022-01-10 18:22:44 -05:00
John Snow
f75b20e4f1 python/aqmp: use absolute import statement
pylint's dependency astroid appears to have bugs in 2.9.1 and 2.9.2 (Dec
31 and Jan 3) that appear to erroneously expect the qemu namespace to
have an __init__.py file. astroid 2.9.3 (Jan 9) avoids that problem, but
appears to not understand a relative import within a namespace package.

Update the relative import - it was worth changing anyway, because these
packages will eventually be packaged and distributed separately.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Beraldo Leal <bleal@redhat.com>
Message-id: 20220110191349.1841027-2-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2022-01-10 18:22:33 -05:00
Michael S. Tsirkin
a882b57123 Revert "virtio: introduce macro IRTIO_CONFIG_IRQ_IDX"
This reverts commit bf1d85c166.

Fixes: bf1d85c166 ("virtio: introduce macro IRTIO_CONFIG_IRQ_IDX")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:02:54 -05:00
Michael S. Tsirkin
a20fa00ce1 Revert "virtio-pci: decouple notifier from interrupt process"
This reverts commit e3480ef81f.

Fixes: e3480ef81f ("virtio-pci: decouple notifier from interrupt process")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:02:36 -05:00
Michael S. Tsirkin
38ce405198 Revert "virtio-pci: decouple the single vector from the interrupt process"
This reverts commit 316011b8a7.

Fixes: 316011b8a7 ("virtio-pci: decouple the single vector from the interrupt process")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:02:16 -05:00
Michael S. Tsirkin
98b34e030e Revert "vhost: introduce new VhostOps vhost_set_config_call"
This reverts commit 8806237234.

Fixes: 8806237234 ("vhost: introduce new VhostOps vhost_set_config_call")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:02:01 -05:00
Michael S. Tsirkin
73bd56abe1 Revert "vhost-vdpa: add support for config interrupt"
This reverts commit 634f7c89fb.

Fixes: 634f7c89fb ("vhost-vdpa: add support for config interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:01:44 -05:00
Michael S. Tsirkin
81c3ebc32f Revert "virtio: add support for configure interrupt"
This reverts commit 081f864f56.

Fixes: 081f864f56 ("virtio: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:01:28 -05:00
Michael S. Tsirkin
a86d1a0a93 Revert "vhost: add support for configure interrupt"
This reverts commit f7220a7ce2.

Fixes: f7220a7ce2 ("vhost: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:01:11 -05:00
Michael S. Tsirkin
b3ef6664b7 Revert "virtio-net: add support for configure interrupt"
This reverts commit 497679d510.

Fixes: 497679d510 ("virtio-net: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:00:54 -05:00
Michael S. Tsirkin
99478e5941 Revert "virtio-mmio: add support for configure interrupt"
This reverts commit d48185f1a4.

Fixes: d48185f1a4 ("virtio-mmio: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:00:38 -05:00
Michael S. Tsirkin
847e9bc974 Revert "virtio-pci: add support for configure interrupt"
This reverts commit d5d24d859c.

Fixes: d5d24d859c ("virtio-pci: add support for configure interrupt")
Cc: "Cindy Lu" <lulu@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-10 16:00:02 -05:00
Peter Maydell
de3f5223fa M68k pull request 20220109
Add virt compat machine type for 7.0
 fix q800 -bios parameter
 fix VRAM refresh
 fix M68K_FEATURE_UNALIGNED_DATA feature
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 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-7.0-pull-request' into staging

M68k pull request 20220109

Add virt compat machine type for 7.0
fix q800 -bios parameter
fix VRAM refresh
fix M68K_FEATURE_UNALIGNED_DATA feature

# gpg: Signature made Sun 09 Jan 2022 11:41:19 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-7.0-pull-request:
  target/m68k: don't word align SP in stack frame if M68K_FEATURE_UNALIGNED_DATA feature enabled
  macfb: fix VRAM dirty memory region logging
  q800: fix segfault with invalid MacROM
  hw: m68k: Add virt compat machine type for 7.0

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-01-10 14:43:03 +00:00
Kostiantyn Kostiuk
206ce9699f qga-win: Detect Windows 11 by build number
Windows 10 and 11 have the same major and minor versions.
So, the only way to determine the correct version is to
use the build number.

After this commit, the guest agent will return the proper
"version" and "version-id" for Windows 11. The "pretty-name"
is read from the registry and will be incorrect until the
MS updates the registry. We only can create some workaround
and replace 10 to 11.

Signed-off-by: Kostiantyn Kostiuk <konstantin@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
2022-01-10 13:05:25 +00:00
Kostiantyn Kostiuk
92857cd738 qga-win: Detect OS based on Windows 10 by first build number
Windows Server 2016, 2019, 2022 are based on Windows 10 and
have the same major and minor versions. So, the only way to
detect the proper version is to use the build number.

Before this commit, the guest agent use the last build number
for each OS, but it causes problems when new OS releases.
There are few preview versions before release, and we
can't update this list.

After this commit, the guest agent will use the first build
number. For each new preview version or release version,
Microsoft increases the build number, so we can add the number
of the first preview build and this will work until the new
OS release.

Signed-off-by: Kostiantyn Kostiuk <konstantin@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
2022-01-10 13:05:04 +00:00
Kostiantyn Kostiuk
d919cea07c gqa-win: get_pci_info: Replace 'while' with 2 calls of the function
Microsoft suggests this solution in the documentation:
https://docs.microsoft.com/en-us/windows/win32/api/setupapi/nf-setupapi-setupdigetdeviceinterfacedetaila

Signed-off-by: Kostiantyn Kostiuk <konstantin@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
2022-01-10 13:04:53 +00:00
Kostiantyn Kostiuk
5f22473ebb gqa-win: get_pci_info: Add g_autofree for few variables
Signed-off-by: Kostiantyn Kostiuk <konstantin@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
2022-01-10 13:04:47 +00:00
Kostiantyn Kostiuk
7cc354613e gqa-win: get_pci_info: Split logic to separate functions
Signed-off-by: Kostiantyn Kostiuk <konstantin@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
2022-01-10 13:04:40 +00:00
Kostiantyn Kostiuk
c49ca88b55 gqa-win: get_pci_info: Free parent_dev_info properly
In case when the function fails to get parent device data,
the parent_dev_info variable will be initialized, but not freed.

Signed-off-by: Kostiantyn Kostiuk <konstantin@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
2022-01-10 13:04:34 +00:00
Kostiantyn Kostiuk
e78ca586d6 gqa-win: get_pci_info: Use common 'end' label
To prevent memory leaks, always try to free initialized variables.

Signed-off-by: Kostiantyn Kostiuk <konstantin@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
2022-01-10 13:04:23 +00:00
Kostiantyn Kostiuk
d0b896a749 gqa-win: get_pci_info: Clean dev_info if handle is valid
Signed-off-by: Kostiantyn Kostiuk <konstantin@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
2022-01-10 13:03:38 +00:00
Kostiantyn Kostiuk
cced3a7230 MAINTAINERS: Add entry for QEMU Guest Agent Windows components
Signed-off-by: Kostiantyn Kostiuk <kkostiuk@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Michael Roth <michael.roth@amd.com>
2022-01-10 13:02:19 +00:00
Alexey Kardashevskiy
1c127fa8e2 pseries: Update SLOF firmware image
The only change is that SLOF is compiled with -mcpu=power5
to make it work on PPC970 too.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2022-01-10 15:31:14 +11:00
Mark Cave-Ayland
31144eb639 target/m68k: don't word align SP in stack frame if M68K_FEATURE_UNALIGNED_DATA feature enabled
Commit a9431a03f7 ("target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature") added
a new feature for processors from the 68020 onwards which do not require data
accesses to be word aligned.

Unfortunately the original commit missed an additional case whereby the SP is
still word aligned when setting up an additional format 1 stack frame so add the
necessary M68K_FEATURE_UNALIGNED_DATA feature guard.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Fixes: a9431a03f7 ("target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature")
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220108180453.18680-1-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-09 12:05:02 +01:00
Mark Cave-Ayland
4e136629f0 macfb: fix VRAM dirty memory region logging
The macfb VRAM memory region was configured with coalescing rather than dirty
memory logging enabled, causing some areas of the screen not to redraw after
a full screen update.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Fixes: 8ac919a065 ("hw/m68k: add Nubus macfb video card")
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220108164147.30813-1-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-09 12:04:30 +01:00
Laurent Vivier
0969e00b39 q800: fix segfault with invalid MacROM
"qemu-system-m68k -M q800 -bios /dev/null" crashes with a segfault
in q800_init().
This happens because the code doesn't check that rom_ptr() returned
a non-NULL pointer .

To avoid NULL pointer, don't allow 0 sized file and use bios_size with
rom_ptr().

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/756
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220107105049.961489-1-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-01-09 12:03:21 +01:00
Laurent Vivier
214bdf8e71 hw: m68k: Add virt compat machine type for 7.0
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20211218114340.1856757-1-laurent@vivier.eu>
2022-01-09 12:02:53 +01:00
Richard Henderson
df722e33d5 bsd-user: arm (32-bit) support
This series of patches brings in 32-bit arm support for bsd-user.  It implements
 all the bits needed to do image activation, signal handling, stack management
 and threading. This allows us to get to the "Hello World" level. The arm and x86
 code are now the same as in the bsd-user fork. For full context, the fork is at
 https://github.com/qemu-bsd-user/qemu-bsd-user/tree/blitz (though the the recent
 sig{bus,segv} needed updates are incomplete).
 
 v5 changes:
    o Moved to using the CPUArchState typedef and move
      set_sigtramp_args, get_mcontext, set_mcontext, and
      get_ucontext_sigreturn prototypes to
      bsd-user/freebsd/target_os_ucontext.h
    o Fix issues with arm's set_mcontext related to masking
      and remove an unnecessary check.
 
 We're down to only one hunk needing review:
     bsd-user/arm/target_arch_signal.c: arm set_mcontext
 
 Warnings that should be ignored:
    o make checkpatch has a couple of complaints about the comments for the
      signal trampoline, since it's a false positive IMHO.
 WARNING: Block comments use a leading /* on a separate line
 +    /* 8 */ sys_sigreturn,
 WARNING: Block comments use a leading /* on a separate line
 +    /* 9 */ sys_exit
 -----BEGIN PGP SIGNATURE-----
 Comment: GPGTools - https://gpgtools.org
 
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 =zscp
 -----END PGP SIGNATURE-----

Merge tag 'bsd-user-arm-pull-request' of gitlab.com:bsdimp/qemu into staging

bsd-user: arm (32-bit) support

This series of patches brings in 32-bit arm support for bsd-user.  It implements
all the bits needed to do image activation, signal handling, stack management
and threading. This allows us to get to the "Hello World" level. The arm and x86
code are now the same as in the bsd-user fork. For full context, the fork is at
https://github.com/qemu-bsd-user/qemu-bsd-user/tree/blitz (though the the recent
sig{bus,segv} needed updates are incomplete).

v5 changes:
   o Moved to using the CPUArchState typedef and move
     set_sigtramp_args, get_mcontext, set_mcontext, and
     get_ucontext_sigreturn prototypes to
     bsd-user/freebsd/target_os_ucontext.h
   o Fix issues with arm's set_mcontext related to masking
     and remove an unnecessary check.

We're down to only one hunk needing review:
    bsd-user/arm/target_arch_signal.c: arm set_mcontext

Warnings that should be ignored:
   o make checkpatch has a couple of complaints about the comments for the
     signal trampoline, since it's a false positive IMHO.
WARNING: Block comments use a leading /* on a separate line
+    /* 8 */ sys_sigreturn,
WARNING: Block comments use a leading /* on a separate line
+    /* 9 */ sys_exit

# gpg: Signature made Fri 07 Jan 2022 11:36:37 PM PST
# gpg:                using RSA key 2035F894B00AA3CF7CCDE1B76C1CD1287DB01100
# gpg: Good signature from "Warner Losh <wlosh@netflix.com>" [unknown]
# gpg:                 aka "Warner Losh <imp@bsdimp.com>" [unknown]
# gpg:                 aka "Warner Losh <imp@freebsd.org>" [unknown]
# gpg:                 aka "Warner Losh <imp@village.org>" [unknown]
# gpg:                 aka "Warner Losh <wlosh@bsdimp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 2035 F894 B00A A3CF 7CCD  E1B7 6C1C D128 7DB0 1100

* tag 'bsd-user-arm-pull-request' of gitlab.com:bsdimp/qemu: (37 commits)
  bsd-user: add arm target build
  bsd-user/freebsd/target_os_ucontext.h: Require TARGET_*CONTEXT_SIZE
  bsd-user/arm/signal.c: arm get_ucontext_sigreturn
  bsd-user/arm/signal.c: arm set_mcontext
  bsd-user/arm/signal.c: arm get_mcontext
  bsd-user/arm/signal.c: arm set_sigtramp_args
  bsd-user/arm/target_arch_signal.h: Define size of *context_t
  bsd-user/arm/target_arch_signal.h: arm machine context and trapframe for signals
  bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack
  bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl
  bsd-user/arm/target_arch_elf.h: arm get hwcap
  bsd-user/arm/target_arch_elf.h: arm defines for ELF
  bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread
  bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm
  bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space
  bsd-user/arm/target_arch_reg.h: Implement core dump register copying
  bsd-user/arm/target_arch_cpu.h: Implement system call dispatch
  bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions
  bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
  bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-08 09:37:59 -08:00
Richard Henderson
afe3326258 Second RISC-V PR for QEMU 7.0
- Fix illegal instruction when PMP is disabled
  - SiFive PDMA 64-bit support
  - SiFive PLIC cleanups
  - Mark Hypervisor extension as non experimental
  - Enable Hypervisor extension by default
  - Support 32 cores on the virt machine
  - Corrections for the Vector extension
  - Experimental support for 128-bit CPUs
  - stval and mtval support for illegal instructions
 -----BEGIN PGP SIGNATURE-----
 
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Merge tag 'pull-riscv-to-apply-20220108' of github.com:alistair23/qemu into staging

Second RISC-V PR for QEMU 7.0

 - Fix illegal instruction when PMP is disabled
 - SiFive PDMA 64-bit support
 - SiFive PLIC cleanups
 - Mark Hypervisor extension as non experimental
 - Enable Hypervisor extension by default
 - Support 32 cores on the virt machine
 - Corrections for the Vector extension
 - Experimental support for 128-bit CPUs
 - stval and mtval support for illegal instructions

# gpg: Signature made Fri 07 Jan 2022 09:50:11 PM PST
# gpg:                using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8  CE8F 21E1 0D29 DF97 7054

* tag 'pull-riscv-to-apply-20220108' of github.com:alistair23/qemu: (37 commits)
  target/riscv: Implement the stval/mtval illegal instruction
  target/riscv: Fixup setting GVA
  target/riscv: Set the opcode in DisasContext
  target/riscv: actual functions to realize crs 128-bit insns
  target/riscv: modification of the trans_csrxx for 128-bit support
  target/riscv: helper functions to wrap calls to 128-bit csr insns
  target/riscv: adding high part of some csrs
  target/riscv: support for 128-bit M extension
  target/riscv: support for 128-bit arithmetic instructions
  target/riscv: support for 128-bit shift instructions
  target/riscv: support for 128-bit U-type instructions
  target/riscv: support for 128-bit bitwise instructions
  target/riscv: accessors to registers upper part and 128-bit load/store
  target/riscv: moving some insns close to similar insns
  target/riscv: setup everything for rv64 to support rv128 execution
  target/riscv: array for the 64 upper bits of 128-bit registers
  target/riscv: separation of bitwise logic and arithmetic helpers
  target/riscv: additional macros to check instruction support
  qemu/int128: addition of div/rem 128-bit operations
  exec/memop: Adding signed quad and octo defines
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:09:24 -08:00
Warner Losh
18fe5d99f2 bsd-user: add arm target build
CC: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Acked-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
ca4fc704a4 bsd-user/freebsd/target_os_ucontext.h: Require TARGET_*CONTEXT_SIZE
Now that all architecutres define TARGET_[MU]CONTEXT_SIZE, enforce
requiring them and always check the sizeof target_{u,m}context_t
sizes.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
3ac34cc985 bsd-user/arm/signal.c: arm get_ucontext_sigreturn
Update ucontext to implement sigreturn.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
d6d4509a9f bsd-user/arm/signal.c: arm set_mcontext
Move the machine context to the CPU state.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
38ce1471c9 bsd-user/arm/signal.c: arm get_mcontext
Get the machine context from the CPU state.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
781be8666c bsd-user/arm/signal.c: arm set_sigtramp_args
Implement set_sigtramp_args to setup the arguments to the sigtramp
calls.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
2cb1e6432f bsd-user/arm/target_arch_signal.h: Define size of *context_t
Define the native sizes of mcontext_t and ucontext_t so that the tests
in target_os_ucontext.h ensure the size of arm's version of these
structures is correct.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
03fd4028f1 bsd-user/arm/target_arch_signal.h: arm machine context and trapframe for signals
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
156d75579f bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack
Defines for registers and stack layout related to signals.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
883d19ccf9 bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl
Implement the extended HW capabilities for HWCAP2.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
6c5d60fa78 bsd-user/arm/target_arch_elf.h: arm get hwcap
Implement get_elf_hwcap to get the first word of hardware capabilities.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
082e65314b bsd-user/arm/target_arch_elf.h: arm defines for ELF
Basic set of defines needed for arm ELF file activation.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
f10521cc22 bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread
Implement target_thread_init (to create a thread) and target_set_upcall
(to switch to a thread) for arm.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
2022-01-07 22:58:51 -07:00
Warner Losh
eacb50b8d9 bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm
Copy of the signal trampoline code for arm, as well as setup_sigtramp to
write it to the stack.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
dacfdf3ba4 bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space
Various parameters describing the layout of the ARM address space. In
addition, define routines to get the stack pointer and to set the second
return value.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
bcacf30808 bsd-user/arm/target_arch_reg.h: Implement core dump register copying
Implement the register copying routines to extract registers from the
cpu for core dump generation.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
8d450c9a30 bsd-user/arm/target_arch_cpu.h: Implement system call dispatch
Implement the system call dispatch. This implements all three kinds of
system call: direct and the two indirect variants. It handles all the
special cases for thumb as well.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
ef1412bd84 bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions
Implement EXCP_PREFETCH_ABORT AND EXCP_DATA_ABORT. Both of these data
exceptions cause a SIGSEGV.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Olivier Houchard <cognet@ci0.org>
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
70985aec1c bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and
EXCP_YIELD. The first two generate a signal to the emulated
binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy
nops.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Mikaël Urankar <mikael.urankar@gmail.com>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00
Warner Losh
06efe3bfce bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation
Add a boiler plate CPU loop that does nothing except return an error for
all traps.

Signed-off-by: Sean Bruno <sbruno@FreeBSD.org>
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-01-07 22:58:51 -07:00