Commit Graph

8114 Commits

Author SHA1 Message Date
Beth Kon
7d93b1fa18 Reset HPET config register on hpet_reset
Without this, after system reset, hpet does not detect transition from
non-legacy to legacy mode.

Signed-off-by: Beth Kon <eak@us.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 17:28:50 -05:00
Kevin Wolf
ca94dbc753 qemu-io: Implement bdrv_load_vmstate/bdrv_save_vmstate
The load_vmstate and save_vmstate functions are implemented as a
variation of the normal read/write operation, enabled by the -b option.
This is the same mechanism as is used to switch from read/write to
pread/pwrite.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 17:28:50 -05:00
Pascal Terjan
bf4e5d9297 Handle vga= in -append
Here is a patch I had sent twice to the list 2 years ago.
Hopefuly this time someone will be interested

It adds support for passing vga mode to linux kernel through
vga= option in -append

Signed-off-by: Pascal Terjan <pterjan@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 17:28:50 -05:00
Isaku Yamahata
07323531c1 ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.

IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 17:28:50 -05:00
Isaku Yamahata
fc7083b530 ioport: remove some #ifdef DEBUG_UNUSED_IOPORT.
remove some #ifdef DEBUG_UNUSED_IOPORT in ioport.c
and use PRIx32 where appropriate

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 17:28:49 -05:00
Stefan Weil
1e37d05904 raw-posix: Handle errors in raw_create
In qemu-iotests, some large images are created using qemu-img.

Without checks for errors, qemu-img will just create an
empty image, and later read / write tests will fail.

With the patch, failures during image creation are detected
and reported.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 17:28:49 -05:00
Andre Przywara
09ac35ac31 omit 3DNOW! CPUID bits from qemu64 CPU model
Since we recently do not disable 3DNOW! support anymore, we should
avoid setting the bits in the default qemu64 CPU model to ease
migration. TCG does not support it anyway and even AMD deprecates
it's usage nowadays.
If you want to use it in KVM, use the phenom, athlon or host CPU
model.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 17:28:49 -05:00
Paolo Bonzini
89befdd1a6 honor -S on incoming migration
-S is not honored by qemu on incoming migration.  If a domain is migrated
while paused, thus, it will start running on the remote machine; this
is wrong.

Given the trivial patch to fix this, it looks more like a thinko
than anything else, probably dating back to the qemu-kvm merge.
The interesting part is that the -S mechanism was in fact *used* when
migrating (setting autostart = 0) and the incoming migration code was
starting the VM at the end of the migration.

Since I was removing the vm_start from there, I also corrected a related
imprecision.  The code was doing a vm_stop "just in case", but we can
be sure that the VM is not running---the vm_start call in vl.c has not
been reached yet.  So the vm_stop is removed together with the vm_start.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 17:28:49 -05:00
Blue Swirl
8167ee8839 Update to a hopefully more future proof FSF address
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 20:47:01 +00:00
Blue Swirl
a1961a4b31 Sparc32: convert slavio interrupt controller to qdev
Also increase QDEV_MAX_IRQ.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 14:15:34 +00:00
Blue Swirl
666713c071 Sparc32: refactor CPU init
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 13:48:20 +00:00
Blue Swirl
a350db853f Sparc32: convert memory to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 13:48:14 +00:00
Blue Swirl
f48f656949 Sparc32: convert boot prom to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 13:48:10 +00:00
Blue Swirl
5f750b2ea0 Sparc32: convert iommu to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 13:47:55 +00:00
Blue Swirl
fa28ec521b Sparc32: convert cs4231 to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 13:47:45 +00:00
Blue Swirl
d3ffcafe25 Sparc32: fix SDL zooming with TCX
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 13:45:57 +00:00
Anthony Liguori
24d904eab3 Don't copy multiboot.bin into pc-bios after built
That dirties the working directory of the tree.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:14 -05:00
Anthony Liguori
7aa486fe6b Fix multiboot.bin build on mingw32
This combination of ld/object was suggested by Bartlomiej Celary

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:14 -05:00
Anthony Liguori
b8c0e7d7c4 Fix non-ACPI Timer Interrupt Routing - v3
v1 -> v2 adds comment suggested by Ryan.
v2 -> v3 clarifies comment and corrects entry count

Signed-off-by: Beth Kon <eak@us.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:14 -05:00
Isaku Yamahata
d8d2e079fa pci.c: remove unnecessary #ifdef DEBUG_PCI.
remove unnecessary #ifdef DEBUG_PCI.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:13 -05:00
Christoph Hellwig
45566e9c99 replace bdrv_{get, put}_buffer with bdrv_{load, save}_vmstate
The VM state offset is a concept internal to the image format.  Replace
the old bdrv_{get,put}_buffer method that require an index into the
image file that is constructed from the VM state offset and an offset
into the vmstate with the bdrv_{load,save}_vmstate that just take an
offset into the VM state.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:13 -05:00
Anthony Liguori
e1e8f35a4f bios: Fix multiple calls into smbios_load_ex
We're marking the used entry bitmap in smbios_load_external() for each
type we check, regardless of whether we loaded anything.  This makes
subsequent calls behave as if we've already loaded the tables from qemu
and can result in missing tables (ex. multiple type4 entries on an SMP
guest).  Only mark the bitmap if we actually load something.

Signed-off-by: Alex Williamson <alex.williamson@hp.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:13 -05:00
Jan Kiszka
84273177f2 gdbstub: x86: Support for setting segment registers
This allows to set segment registers via gdb also in system emulation
mode. Basic sanity checks are applied and nothing is changed if they
fail. But screwing up the target via this interface will never be
complicated, so I avoided being too paranoid here.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:13 -05:00
Jan Kiszka
b1631e7a6f gdbstub: x86: Refactor register access
Clarify gdb's register set layout by using constants for
cpu_gdb_read/write_register.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:13 -05:00
Jan Kiszka
dd32aa1047 gdbstub: Add vCont support
This patch adds support for the vCont remote gdb command. It is used by
gdb 6.8 or better to switch the debugging focus for single-stepping
multi-threaded targets, ie. multi-threaded application in user mode
emulation or VCPUs in system emulation.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:13 -05:00
Anthony Liguori
8389e7f4e1 slirp: Fix default netmask to 255.255.255.0
This got broken between a13a4126c8 and c92ef6a22d: old slirp code used
255.255.255.0.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:12 -05:00
Anthony Liguori
ef2039f17d Regenerate BIOS and add patches for -boot option
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:12 -05:00
Jan Kiszka
2221dde5d4 Update boot option documentation
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:12 -05:00
Jan Kiszka
9538749118 Add boot menu control via command line switch
Disable the lengthy BIOS prompt for selecting a boot device by default,
but let the user reenable it via '-boot menu=on'.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:12 -05:00
Jan Kiszka
e0f084bfc9 Add boot-once support
This allows to specify an exceptional boot order only for the first
startup of the guest. After reboot, qemu will switch back to the default
order (or what was specified via 'order='). Makes installing from CD
images and then booting the freshly set up harddisk more handy.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:12 -05:00
Jan Kiszka
dda9b29f61 Add qemu_unregister_reset
Will be used by '-boot once=...', and should also help in other use
cases.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:12 -05:00
Jan Kiszka
55ddfe8ef5 Rework reset handler management
Convert the reset handler maintenance code to TAILQ services.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:12 -05:00
Jan Kiszka
76e30d0f13 Move boot_set callback backend
Move registration function for the boot_set callback handler and provide
qemu_boot_set so that it can also be used outside the monitor code.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:12 -05:00
Jan Kiszka
ef3adf68f8 Rework -boot option
This patch changes the boot command line option to the canonical format

 -boot [order=drives][,...]

where 'drives' is using the same format as the old -boot. The format
switch allows to add the 'menu' and 'once' options in later patches. The
old format is still understood and will be processed at least for a
transition time.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:11 -05:00
Mark McLoughlin
e8b2a1c648 Add a pc-0-10 machine type for compatibility with 0.10.x
Add a pc-0-10 machine type to allow a pc machine to be created with
virtio block and console devices compatibility with qemu-0.10.x.

Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:11 -05:00
Mark McLoughlin
21d58b575e Change default PCI class of virtio-console to PCI_CLASS_SERIAL_OTHER
We're using PCI_CLASS_DISPLAY_OTHER now, but qemu-kvm.git is using
PCI_CLASS_OTHERS because:

  "As a PCI_CLASS_DISPLAY_OTHER, it reduces primary display somehow on
   Windows XP (possibly Windows disables acceleration since it fails
   to find a driver)."

While this is valid, many versions of X will get confused by it.
Class major number of 0 gets treated as a possibly prehistoric VGA
device, and then the autoconfig logic gets confused trying to figure
out whether the virtio console or the pv vga device are the real VGA.

We should really set a proper class ID. 0x0780 (serial / other) seems
most appropriate. This shouldn't require any kernel changes, the
modalias for virtio looks like:

  alias:          pci:v00001AF4d*sv*sd*bc*sc*i*

so won't care what the base class or subclass are.

It shows up in the guest as:

  00:05.0 Communication controller: Qumranet, Inc. Virtio console

A new qdev type is introduced to allow devices using the old class
to be created for compatibility with qemu-0.10.x.

Reported-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:10 -05:00
Mark McLoughlin
5c634ef30d Change default PCI class of virtio-blk to PCI_CLASS_STORAGE_SCSI
Windows virtio driver cannot pass DTM (certification) tests while the
storage class is PCI_CLASS_STORAGE_UNKNOWN.

A new qdev type is introduced to allow devices using the old class
to be created for compatibility with qemu-0.10.x.

Reported-by: Dor Laor <dlaor@redhat.com>
Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16 08:28:10 -05:00
Blue Swirl
6f6260c7d6 Sparc32: convert sparc32_dma to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-15 20:45:19 +00:00
malc
430c7ec700 Avoid SIGSEGV when dumping cpu state without enabled logging
Signed-off-by: malc <av1474@comtv.ru>
2009-07-15 21:03:34 +04:00
Blue Swirl
f64ab228b8 Convert fdc to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-15 14:41:54 +00:00
Blue Swirl
c70c59eeec Sparc32: convert slavio timers to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-15 08:53:09 +00:00
Blue Swirl
6c319c8222 Sparc32/PPC: convert escc to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-15 08:51:32 +00:00
Blue Swirl
2582cfa0cb Sparc32: convert slavio_misc to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-13 16:51:27 +00:00
Blue Swirl
325f27475d Sparc32: convert idreg to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-13 16:11:08 +00:00
Baojun Wang
f407823616 target-ppc: enable PPC_MFTB for 44x
According to PPC440 user manual, PPC 440 supports ``mftb'' even it's a
preserved instruction:

PPC440_UM2013.pdf, p.445, table A-3

when I compile a kernel (2.6.30, bamboo_defconfig/440EP &
canyonlands/460EX), I can see ``mftb'' by using ppc-xxx-objdump
vmlinux

I have also checked the ppc 440x[456], 460S, 464, they also should support mftb.

The following patch enable mftb for all ppc 440 variants, including:
440EP, 440GP, 440x4, 440x5 and 460

Signed-off-by: Baojun Wang <wangbj@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-13 01:58:12 +02:00
Baojun Wang
fbe73008f2 ppc tcg: fix wrong bit/mask of wrteei
Signed-off-by: Baojun Wang <wangbj@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-13 01:51:17 +02:00
Nathan Froyd
22555301ad gdb-xml: fix hacks in powerpc register numbering
The powerpc xml files contained a hack--an empty, non-existent
register--for getting the register numbers to line up for
newer (XML-aware) and older (non-XML-aware) GDB.  While this hack worked
in some cases, it didn't work in all cases, notably when the user used
`finish' or `continue': GDB would attempt to read the non-existent
register and QEMU would complain.

This patch fixes things up properly.  Instead of inserting a fake
register, we explicitly declare the floating-point and SPE registers to
start at 71.  This action accomplishes the same thing as the nasty hack,
except that now GDB never tries to fetch the non-existant register 70.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-12 23:42:05 +02:00
Nathan Froyd
33890b3e0d target-ppc: fix evmergelo and evmergelohi
For 32-bit PPC targets, we translated:

evmergelo rX, rX, rY

as:

rX-lo = rY-lo
rX-hi = rX-lo

which is wrong, because we should be transferring rX-lo first.  This
problem is fixed by swapping the order in which we write the parts of
rX.

Similarly, we translated:

evmergelohi rX, rX, rY

as:

rX-lo = rY-hi
rX-hi = rX-lo

In this case, we can't swap the assignment statements, because that
would just cause problems for:

evmergelohi rX, rY, rX

Instead, we detect the first case and save rX-lo in a temporary
variable:

tmp = rX-lo
rX-lo = rY-hi
rX-hi = tmp

These problems don't occur on PPC64 targets because we don't split the
SPE registers into hi/lo parts for such targets.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-12 23:36:21 +02:00
Tristan Gingold
f55e9d9a40 target-ppc: fix typo in _cpu_ppc_load_decr
Use parameter 'next' to fix the hdecr case.
Also pass 'next' by value instead of pointer (more easy to read and no
performance issue for an always_inline function).

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-12 23:32:11 +02:00
Blue Swirl
d27cf0ae6d Sparc32/Sparc64/PPC: convert m48txx to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-12 20:07:07 +00:00