Commit Graph

80230 Commits

Author SHA1 Message Date
Richard Henderson
8a42ddf013 target/microblaze: Tidy gdbstub
Use an enumeration for the gdb register mapping.  Use one
switch statement for the entire dispatch.  Drop sreg_map
and simply enumerate those cases explicitly.  Force r0 to
have value 0 and ignore writes.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01 07:41:38 -07:00
Richard Henderson
853c93ed0d tests/tcg: Do not require FE_* exception bits
Define anything that is missing as 0, so that flags & FE_FOO
is false for any missing FOO.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01 07:41:38 -07:00
Richard Henderson
4c71dc37fb tests/tcg: Do not require FE_TOWARDZERO
This is optional in ISO C, and not all cpus provide it.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01 07:41:38 -07:00
Richard Henderson
cdc05fb4c3 tests/tcg: Add microblaze to arches filter
Not attempting to use a single cross-compiler for both
big-endian and little-endian at this time.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01 07:41:38 -07:00
Peter Maydell
071a6dba7d Pull request trivial patches 20200901
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Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging

Pull request trivial patches 20200901

# gpg: Signature made Tue 01 Sep 2020 15:08:59 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-for-5.2-pull-request: (44 commits)
  docs/system: Fix grammar in documentation
  main-loop: Fix comment
  hw/display/vga:Remove redundant statement in vga_draw_graphic()
  hw/intc: fix default registers value in exynos4210_combiner_read()
  usb/bus: Remove dead assignment in usb_get_fw_dev_path()
  vfio/platform: Remove dead assignment in vfio_intp_interrupt()
  hw/net/virtio-net:Remove redundant statement in virtio_net_rsc_tcp_ctrl_check()
  hw/virtio/vhost-user:Remove dead assignment in scrub_shadow_regions()
  target/arm/translate-a64:Remove redundant statement in disas_simd_two_reg_misc_fp16()
  target/arm/translate-a64:Remove dead assignment in handle_scalar_simd_shli()
  hw/arm/omap1:Remove redundant statement in omap_clkdsp_read()
  hw/arm/virt-acpi-build:Remove dead assignment in build_madt()
  linux-user: Add strace support for printing OFD fcntl operations
  util/vfio-helpers: Unify trace-events size format
  hw/net/xilinx_axienet: Remove unused code
  hw/scsi/scsi-disk: Replace magic '512' value by BDRV_SECTOR_SIZE
  hw/ide/pci: Replace magic '512' value by BDRV_SECTOR_SIZE
  hw/ide/atapi: Replace magic '512' value by BDRV_SECTOR_SIZE
  hw/ide/ahci: Replace magic '512' value by BDRV_SECTOR_SIZE
  hw/ide/core: Trivial typo fix
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-01 15:19:33 +01:00
Graeme Gregory
3f462bf0f6 hw/arm/sbsa-ref : Add embedded controller in secure memory
Add the previously created sbsa-ec device to the sbsa-ref machine in
secure memory so the PSCI implementation in ARM-TF can access it, but
not expose it to non secure firmware or OS except by via ARM-TF.

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Tested-by: Leif Lindholm <leif@nuviainc.com>
Message-id: 20200826141952.136164-3-graeme@nuviainc.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-01 14:01:34 +01:00
Graeme Gregory
dccb92b5ca hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref
A difference between sbsa platform and the virt platform is PSCI is
handled by ARM-TF in the sbsa platform. This means that the PSCI code
there needs to communicate some of the platform power changes down
to the qemu code for things like shutdown/reset control.

Space has been left to extend the EC if we find other use cases in
future where ARM-TF and qemu need to communicate.

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Tested-by: Leif Lindholm <leif@nuviainc.com>
Message-id: 20200826141952.136164-2-graeme@nuviainc.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-01 14:01:12 +01:00
Paolo Bonzini
cb572714f9 meson: add description to options
This will be useful in the future to generate configure
command line parsing from meson_options.txt.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:44 -04:00
Paolo Bonzini
49b7d74426 build: fix recurse-all target
The missing "/all" suffix prevents the pc-bios/ parts of the build
from running.

In the meanwhile, -Wall has moved from QEMU_CFLAGS to CFLAGS.  Simplify
everything by not passing down CFLAGS, and add -Wall in the recursive
Makefiles.

Reported-by: Miroslav Rezanina <mrezanin@redhat.com>
Reviewed-by: Miroslav Rezanina <mrezanin@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Fixes: 5e6d1573b4 ("remove Makefile.target", 2020-08-21)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:35 -04:00
Paolo Bonzini
1a94933fcc meson: use pkg-config method to find dependencies
We do not need to ask cmake for the dependencies, so just use the
pkg-config mechanism.  Keep "auto" for SDL so that it tries using
sdl-config too.

The documentation is adjusted to use SDL2_image as the example,
rather than SDL which does not use the "pkg-config" method.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:35 -04:00
Paolo Bonzini
87727cb1d2 configure: do not include ${prefix} in firmwarepath
Left out in commit 22a87800e6 ("configure: expand path variables for
meson configure", 2020-08-21), do it now.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:34 -04:00
Paolo Bonzini
289e12dbc4 meson: add pixman dependency to UI modules
Pixman used to be included directly in QEMU_CFLAGS and therefore the
include path was added to every compiler invocation.  Now that (just
like basically everything else) it is a separate dependency, we
need to add it to all build target, especially UI modules that need
it due to their including ui/console.h.

Reported-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:34 -04:00
Stefan Weil
a03e2cd749 meson: add pixman dependency to chardev/baum module
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200830204640.482214-1-sw@weilnetz.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:34 -04:00
Marc-André Lureau
8adfeba953 meson: add NSIS building
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20200826110419.528931-9-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:34 -04:00
Marc-André Lureau
b81efab7c7 meson: use meson mandir instead of qemu_mandir
When cross-compiling, by default qemu_mandir is 'c:\Program
Files\QEMU', which is not recognized as being an absolute path, and
meson will end up adding the prefix again.

Use the pre-prefixed meson mandir option instead.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20200826110419.528931-8-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:34 -04:00
Marc-André Lureau
491e74c158 meson: pass docdir option
When cross-compiling, by default qemu_docdir is 'c:\Program Files\QEMU\'
which is not recognized as being an absolute path, and meson will end up
adding the prefix again.

Add an option to pass docdir location to meson, pre-prefixed like we do
with other directories, build qemu_docdir with the common suffix and use
that instead of config_host['qemu_docdir'].

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20200826110419.528931-7-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:33 -04:00
Marc-André Lureau
ab4c0996f8 meson: use meson datadir instead of qemu_datadir
When cross-compiling, by default qemu_datadir is 'c:\Program
Files\QEMU', which is not recognized as being an absolute path, and
meson will end up adding the prefix again.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20200826110419.528931-6-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:33 -04:00
Marc-André Lureau
73f3aa3766 meson: pass qemu_suffix option
The following patches will make use of it to fix installation paths.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20200826110419.528931-5-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:33 -04:00
Marc-André Lureau
ca8c0909f0 configure: build docdir like other suffixed directories
As documented in --help for --docdir.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20200826110419.528931-4-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:33 -04:00
Marc-André Lureau
10ff82d1ff configure: always /-seperate directory from qemu_suffix
Otherwise, we may accept very strange directory names...

While at it, quote the variables.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20200826110419.528931-3-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:33 -04:00
Marc-André Lureau
77433a5fef configure: rename confsuffix option
The value is used to construct conf/mod/data directories.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20200826110419.528931-2-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:32 -04:00
Paolo Bonzini
1ffb3bbb3c meson: move zlib detection to meson
Meson includes the same logic that tries to look for -lz if
pkg-config (and cmake) cannot find zlib.  The undocumented
--disable-zlib-test option becomes a no-op.

There is still an instance of "-lz" in the LIBS directory.
It will go away as soon as tests are converted to meson,
because the zlib dependency does not propagate from libblock.fa
to the Makefile-build unit tests.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01 08:51:32 -04:00
Leif Lindholm
999f6ebde5 hw/arm/sbsa-ref: add "reg" property to DT cpu nodes
The sbsa-ref platform uses a minimal device tree to pass amount of memory
as well as number of cpus to the firmware. However, when dumping that
minimal dtb (with -M sbsa-virt,dumpdtb=<file>), the resulting blob
generates a warning when decompiled by dtc due to lack of reg property.

Add a simple reg property per cpu, representing a 64-bit MPIDR_EL1.

This also ends up being cleaner than having the firmware calculating its
own IDs for generating APCI.

Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200827124335.30586-1-leif@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-01 13:22:07 +01:00
Igor Kononenko
ddd8ab1974 hw: add a number of SPI-flash's of m25p80 family
Support a following SPI flashes:
* mx66l51235f
* mt25ql512ab

Signed-off-by: Igor Kononenko <i.kononenko@yadro.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200811203724.20699-1-i.kononenko@yadro.com>
Message-Id: <20200819100956.2216690-22-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:51 +02:00
Igor Kononenko
d98c48a19f arm: aspeed: add strap define 25HZ of AST2500
Provide a definition for the "25Hz reference clock input mode" strap

Signed-off-by: Igor Kononenko <i.kononenko@yadro.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200811203502.20382-1-i.kononenko@yadro.com>
Message-Id: <20200819100956.2216690-21-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:51 +02:00
Cédric Le Goater
1f240ca1eb aspeed/smc: Open AHB window of the second chip of the AST2600 FMC controller
This change works around the HW default values to be able to test the
Tacoma board with -kernel command line option. This was required when
we had both flash chips enabled in the device tree, otherwise Linux
would fail to probe the entire controller leaving it with no rootfs.

Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-20-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:51 +02:00
Cédric Le Goater
9951133e46 aspeed/sdmc: Simplify calculation of RAM bits
Changes in commit 533eb415df ("arm/aspeed: actually check RAM size")
introduced a 'valid_ram_sizes' array which can be used to compute the
associated bit field value encoding the RAM size. The field is simply
the index of the array.

Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-19-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:51 +02:00
Joel Stanley
57de884d55 aspeed/sdmc: Allow writes to unprotected registers
A subset of registers are not protected by the lock behaviour, so allow
unconditionally writing to those.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-18-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:51 +02:00
Joel Stanley
14c179541b aspeed/sdmc: Perform memory training
This allows qemu to run the "normal" power on reset boot path through
u-boot, where the DDR is trained.

An enhancement would be to have the SCU bit stick across qemu reboots,
but be unset on initial boot.

Proper modelling would be to discard all writes to the phy setting regs
at offset 0x100 - 0x400 and to model the phy status regs at offset
0x400.

The status regs model would only need to account for offets 0x00,
0x50, 0x68 and 0x7c.

Signed-off-by: Joel Stanley <joel@jms.id.au>
[ clg: checkpatch fixes ]
Message-Id: <20200819100956.2216690-17-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:51 +02:00
Cédric Le Goater
e0059c8883 ftgmac100: Improve software reset
The software reset of the MAC needs a finer granularity. Some settings
in MACCR are kept.

Cc: Frederic Konrad <konrad.frederic@yahoo.fr>
Fixes: bd44300d1a ("net: add FTGMAC100 support")
Message-Id: <20200819100956.2216690-16-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
c2ab73fcbe ftgmac100: Fix integer overflow in ftgmac100_do_tx()
When inserting the VLAN tag in packets, memmove() can generate an
integer overflow for packets whose length is less than 12 bytes.

Move the VLAN insertion when the last segment of the frame is reached
and check length against the size of the ethernet header (14 bytes) to
avoid the crash. Return FTGMAC100_INT_XPKT_LOST status if the frame is
too small. This seems like a good modeling choice even if Aspeed does
not specify anything in that case.

Cc: Frederic Konrad <konrad.frederic@yahoo.fr>
Cc: Mauro Matteo Cascella <mcascell@redhat.com>
Reported-by: Ziming Zhang <ezrakiez@gmail.com>
Message-Id: <20200819100956.2216690-15-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
af6d66e235 ftgmac100: Check for invalid len and address before doing a DMA transfer
According to the Aspeed specs, no interrupts are raised in that case
but a "Tx-packets lost" status seems like a good modeling choice for
all implementations. It is covered by the Linux kernel.

Cc: Frederic Konrad <konrad.frederic@yahoo.fr>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-14-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
9c30f092a0 ftgmac100: Change interrupt status when a DMA error occurs
The model uses today the "Normal priority transmit buffer unavailable"
interrupt status which it is not appropriate. According to the Aspeed
specs, no interrupts are raised in that case. An "AHB error" status
seems like a better modeling choice for all implementations since it
is covered by the Linux kernel.

Cc: Frederic Konrad <konrad.frederic@yahoo.fr>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-13-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
cf9f48d323 ftgmac100: Fix interrupt status "Packet moved to RX FIFO"
As we don't model the RX or TX FIFO, raise the "Packet moved to RX
FIFO" interrupt status bit as soon as we are handling a RX packet.

Cc: Frederic Konrad <konrad.frederic@yahoo.fr>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-12-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
dcf5137696 ftgmac100: Fix interrupt status "Packet transmitted on ethernet"
The second field of the TX descriptor has a set of flags to choose
when the transmit interrupt is raised : after the packet has been sent
on the ethernet or after it has been moved into the TX FIFO. But we
don't model that today.

Simply raise the "Packet transmitted on ethernet" interrupt status bit
as soon as the packet is sent by QEMU.

Cc: Frederic Konrad <konrad.frederic@yahoo.fr>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-11-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
39161476ab ftgmac100: Fix registers that can be read
Receive Ring Base Address Register (RXR_BADR) and the Normal Priority
Transmit Receive Ring Base Address Register (NPTXR_BADR) can also be
read.

Cc: Frederic Konrad <konrad.frederic@yahoo.fr>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-10-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
f31e8f1318 aspeed/sdhci: Fix reset sequence
BIT(0) of the ASPEED_SDHCI_INFO register is set by SW and polled until
the bit is cleared by HW.

Use the number of supported slots to define the default value of this
register (The AST2600 eMMC Controller only has one). Fix the reset
sequence by clearing automatically the RESET bit.

Cc: Eddie James <eajames@linux.ibm.com>
Fixes: 2bea128c3d ("hw/sd/aspeed_sdhci: New device")
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-9-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
9b9624714c aspeed/smc: Fix max_slaves of the legacy SMC device
The legacy controller only has one slave.

Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-8-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
0d3119edd0 aspeed/smc: Fix MemoryRegionOps definition
Unaligned access support is a leftover from the initial commit. There
is no such need on this device register mapping. Remove it.

Cc: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-7-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Erik Smit
40a38df55e hw/arm/aspeed: Add board model for Supermicro X11 BMC
The BMC Firmware can be downloaded from :

  https://www.supermicro.com/en/products/motherboard/X11SSL-F

Signed-off-by: Erik Smit <erik.lucas.smit@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[ clg: Prettified Erik's name in email
       Modified commit log ]
Message-Id: <20200715173418.186-1-erik.lucas.smit@gmail.com>
Message-Id: <20200819100956.2216690-6-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
740bc3a7e6 aspeed/scu: Fix valid access size on AST2400
The read access size of the SCU registers can be 1/2/4 bytes and write
is 4 bytes and all Aspeed models would need a .valid.accepts() handler.

For the moment, set the min access size to 1 byte to cover both read
and write operations on the AST2400 but keep the min access size of
the other SoCs to 4 bytes as this is an unusual access size.

This fixes support for some old firmware doing 2 bytes reads on the
AST2400 SoC.

Reported-by: Erik Smit <erik.lucas.smit@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-5-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
31fc566f5e m25p80: Add support for n25q512ax3
Datasheet available here :

https://www.micron.com/-/media/client/global/Documents/Products/Data%20Sheet/NOR%20Flash/Serial%20NOR/N25Q/n25q_512mb_1ce_3v_65nm.pdf

Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-4-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Cédric Le Goater
6bbe036f32 m25p80: Return the JEDEC ID twice for mx25l25635e
The mx25l25635e returns the JEDEC ID twice when issuing a RDID command :

  [    2.512027] aspeed-smc 1e630000.spi: reading JEDEC ID C2:20:19:C2:20:19

This can break some firmware testing for this condition on the
supermicrox11-bmc machine.

Reported-by: Erik Smit <erik.lucas.smit@gmail.com>
Message-Id: <20200819100956.2216690-2-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01 14:21:50 +02:00
Peter Maydell
5f07817eb9 target/arm: Enable FP16 in '-cpu max'
Set the MVFR1 ID register FPHP and SIMDHP fields to indicate
that our "-cpu max" has v8.2-FP16.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-46-peter.maydell@linaro.org
2020-09-01 11:46:21 +01:00
Peter Maydell
fc8ae79031 target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS
Convert the Neon floating-point VMUL, VMLA and VMLS to use gvec,
and use this to implement fp16 support.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-45-peter.maydell@linaro.org
2020-09-01 11:45:36 +01:00
Peter Maydell
c50d8d1440 target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations
Add gvec helpers for doing Neon-style indexed non-fused fp
multiply-and-accumulate operations.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200828183354.27913-44-peter.maydell@linaro.org
2020-09-01 11:45:32 +01:00
Peter Maydell
d7ce81e553 target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations
In the gvec helper functions for indexed operations, for AArch32
Neon the oprsz (total size of the vector) can be less than 16 bytes
if the operation is on a D reg. Since the inner loop in these
helpers always goes from 0 to segment, we must clamp it based
on oprsz to avoid processing a full 16 byte segment when asked to
handle an 8 byte wide vector.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-43-peter.maydell@linaro.org
2020-09-01 11:45:29 +01:00
Peter Maydell
23afcdd251 target/arm: Implement fp16 for Neon VRINTX
Convert the Neon VRINTX insn to use gvec, and use this to implement
fp16 support for it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-42-peter.maydell@linaro.org
2020-09-01 11:45:25 +01:00
Peter Maydell
18725916b1 target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode
Convert the Neon VRINT-with-specified-rounding-mode insns to gvec,
and use this to implement the fp16 versions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-41-peter.maydell@linaro.org
2020-09-01 11:45:20 +01:00
Peter Maydell
ca88a6efdf target/arm: Implement fp16 for Neon VCVT with rounding modes
Convert the Neon VCVT with-specified-rounding-mode instructions
to gvec, and use this to implement fp16 support for them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-40-peter.maydell@linaro.org
2020-09-01 11:38:58 +01:00