Commit Graph

69 Commits

Author SHA1 Message Date
Alistair Francis
db635521a0 stm32f205: Add the stm32f205 SoC
This patch adds the stm32f205 SoC. This will be used by the
Netduino 2 to create a machine.

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 48d509747a1ea0d8a7d5480560495e679990f9d2.1424175342.git.alistair@alistair23.me
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11 13:21:06 +00:00
Alistair Francis
bbbbd9002f stm32f2xx_SYSCFG: Add the stm32f2xx SYSCFG
This patch adds the stm32f2xx System Configuration
Controller. This is used to configure what memory is mapped
at address 0 (although that is not supported) as well
as configure how the EXTI interrupts work (also not
supported at the moment).

This device is not required for basic examples, but more
complex systems will require it (as well as the EXTI device)

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 5d499d7b60b61d5d6dcb310b2e55411b1f53794e.1424175342.git.alistair@alistair23.me
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11 13:21:05 +00:00
Alistair Francis
73af5d1115 stm32f2xx_USART: Add the stm32f2xx USART Controller
This patch adds the stm32f2xx USART controller
(UART also uses the same controller).

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 762c6c0d2a41d574932bc4445ec9bfffe6da8798.1424175342.git.alistair@alistair23.me
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11 13:21:05 +00:00
Alistair Francis
be28470514 stm32f2xx_timer: Add the stm32f2xx Timer
This patch adds the stm32f2xx timers: TIM2, TIM3, TIM4 and TIM5
to QEMU.

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 155091a323390f8da3cca496e4c611c493e62a77.1424175342.git.alistair@alistair23.me
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11 13:21:05 +00:00
David Gibson
2296594257 Create specific config option for "platform-bus"
Currently the "platform-bus" device is included for all softmmu builds.
This bridge is intended for use on any platforms that require dynamic
creation of sysbus devices.  However, at present it is used only for the
PPC E500 target, with plans for the ARM "virt" target in the immediate
future.

To avoid a not-very-useful entry appearing in "qemu -device ?" output on
other targets, this patch makes a specific config option for platform-bus
and enables it (for now) only on ppc configurations which include E500
and on ARM (which always includes the "virt" target).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <1425017077-18487-3-git-send-email-david@gibson.dropbear.id.au>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-27 15:17:42 +01:00
David Gibson
4681867544 Add specific config options for PCI-E bridges
The i82801b11, ioh3420 and xio3130 PCI Express devices are currently
included in the build unconditionally.

While they could theoretically appear on any target platform with PCI-E,
they're pretty unlikely to appear on platforms that aren't Intel derived.

Therefore, to avoid presenting unlikely-to-be-relevant devices to the user,
add config options to enable these components, and enable them by default
only on x86 and arm platforms.

(Note that this patch does include these for aarch64, via its inclusion of
arm-softmmu.mak).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-Id: <1425017077-18487-2-git-send-email-david@gibson.dropbear.id.au>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-27 15:17:35 +01:00
David Gibson
c3cf77cb63 Make sysbus EHCI devices ARM only by default
A number of ARM embedded boards include EHCI USB host controllers which
appear as directly mapped devices, rather than sitting on a PCI bus.

At present code to emulate such devices is included whenever EHCI support
is included.  This patch adjusts teh config options to only include them
in builds targetting ARM by default.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-02-18 10:53:10 +01:00
Alexander Graf
4ab29b8214 arm: Add PCIe host bridge in virt machine
Now that we have a working "generic" PCIe host bridge driver, we can plug
it into ARM's virt machine to always have PCIe available to normal ARM VMs.

I've successfully managed to expose a Bochs VGA device, XHCI and an e1000
into an AArch64 VM with this and they all lived happily ever after.

Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Claudio Fontana <claudio.fontana@huawei.com>
[PMM: Squashed in fix for off-by-one error in bus-range DT property
 from Laszlo Ersek <lersek@redhat.com>]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-02-13 05:46:08 +00:00
Beniamino Galvani
22f90bcb2b hw/net: add support for Allwinner EMAC Fast Ethernet controller
This patch adds support for the Fast Ethernet MAC found on Allwinner
SoCs, together with a basic emulation of Realtek RTL8201CP PHY.

Since there is no public documentation of the Allwinner controller, the
implementation is based on Linux kernel driver.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08 14:50:48 +00:00
liguang
9158fa5451 hw/arm: add allwinner a10 SoC support
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1387159292-10436-5-git-send-email-lig.fnst@cn.fujitsu.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 20:12:51 +00:00
liguang
c3931ee8b4 hw/intc: add allwinner A10 interrupt controller
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1387159292-10436-4-git-send-email-lig.fnst@cn.fujitsu.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 20:12:51 +00:00
liguang
3589de8c97 hw/timer: add allwinner a10 timer
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1387159292-10436-3-git-send-email-lig.fnst@cn.fujitsu.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 20:12:51 +00:00
Antony Pavlov
c6f09eb4a0 hw/arm: add very initial support for Canon DIGIC SoC
DIGIC is Canon Inc.'s name for a family of SoC
for digital cameras and camcorders.

There is no publicly available specification for
DIGIC chips. All information about DIGIC chip
internals is based on reverse engineering efforts
made by CHDK (http://chdk.wikia.com) and
Magic Lantern (http://www.magiclantern.fm) projects
contributors.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1387188908-754-2-git-send-email-antonynpavlov@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17 20:12:51 +00:00
Peter Crosthwaite
c21c3b53e1 hw/timer: Introduce ARM A9 Global Timer.
The ARM A9 MPCore has a timer that is global to all cores in the cluster.
The timer is shared but each core has a private independent comparator
and interrupt.

Based on version contributed by Francois LEGAL.

Signed-off-by: François LEGAL <devel@thom.fr.eu.org>
Message-id: 4918e89476b8da916be2964ec41578b50d569a37.1385969450.git.peter.crosthwaite@xilinx.com
[PC changes:
 * New commit message
 * Re-implemented as single timer model
 * Fixed backwards counting issue in polled mode
 * completed VMSD fields
 * macroified magic numbers (and headerified reg definitions)
 * split of as device-model-only patch
 * use bitops for 64 bit register access
 * Fixed auto increment mode to check condition properly
 * general cleanup (names/style etc).
]
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
[PMM:
 * minor typo fixes
 * added missing return after error_setg()
 * dropped setting dc->no_user = 1
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:24:51 +00:00
Andreas Färber
53cb9a1c2f arm11mpcore: Split off SCU device
Inspired by a9scu.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05 17:47:30 +01:00
Alex Bennée
b86160555f integrator: fix Linux boot failure by emulating dbg region
Commit 9b8c69243 (since reverted) broke the ability to boot the kernel
as the value returned by unassigned_mem_read returned non-zero and left
the kernel looping forever waiting for it to change (see
integrator_led_set in the kernel code).

Relying on a varying implementation detail is incorrect anyway so this
introduces a basic stub of a memory region for the debug/LED section
on the integrator board.

Signed-off-by: Alex Bennée <alex@bennee.com>
Message-id: 1382451366-9539-1-git-send-email-alex.bennee@linaro.org
[PMM: removed three unused fields from struct IntegratorDebugState]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-10-31 14:00:16 +01:00
Ákos Kovács
b77abd95a9 default-configs/: CONFIG_GDBSTUB_XML removed
Makefile.target: Build gdbstub-xml.o only when
TARGET_XML_FILES is not empty.

Signed-off-by: Ákos Kovács <akoskovacs@gmx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-10-16 18:21:01 +02:00
Peter Maydell
66aae5e1ec default-configs: Fix A9MP and A15MP config names
When individual CONFIG_ switches for the A9MPcore and A15MPcore
devices were created, they were inadvertently given incorrect names
(CONFIG_ARM9MPCORE and CONFIG_ARM15MPCORE). These CPUs are
"Cortex-A9MP" and "Cortex-A15MP", and in particular the ARM9 is
a different (rather older) CPU than the Cortex-A9. Rename the
CONFIG_ switches to bring them into line with the source file
names and CPU names.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1376056215-26391-1-git-send-email-peter.maydell@linaro.org
2013-08-20 14:54:32 +01:00
Stefan Weil
174d5d990c hw: Add lost ARM core again
Commit 0434e30afb accidentally removed
the compilation of arm11mpcore.c.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15 15:16:30 +02:00
Paolo Bonzini
0434e30afb hw: move ARM CPU cores to hw/cpu/, configure with default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:16 +02:00
Paolo Bonzini
e28bee8ee6 hw: move other devices to hw/misc/, configure with default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:16 +02:00
Paolo Bonzini
7702e47c21 hw: move interrupt controllers to hw/intc/, configure with default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:16 +02:00
Paolo Bonzini
3bd884511f hw: move timer devices to hw/timer/, configure with default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:14 +02:00
Paolo Bonzini
9944d32001 hw: move char devices to hw/char/, configure via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:14 +02:00
Paolo Bonzini
31e1706082 hw: move SSI controllers to hw/ssi/, configure via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:13 +02:00
Paolo Bonzini
53ed424e09 hw: move I2C controllers to hw/i2c/, configure via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:13 +02:00
Paolo Bonzini
fc97bb5ba3 hw: move display devices to hw/display/, configure via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:13 +02:00
Paolo Bonzini
34b8f63ea1 hw: move audio devices to hw/audio/, configure via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:13 +02:00
Paolo Bonzini
7b2478956a hw: move block devices to hw/block/, configure via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:13 +02:00
Paolo Bonzini
d7e35d4a84 hw: move NICs to hw/net/, configure via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:13 +02:00
Paolo Bonzini
aaa4d1df2e hw: make all of hw/usb/ configurable via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:12 +02:00
Paolo Bonzini
9a1179dc86 hw: make all of hw/ide/ configurable via default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08 18:13:12 +02:00
Peter Crosthwaite
06a1cea5f6 pl330: Initial version
Device model for Primecell PL330 DMA controller.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru>
Tested-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 098aac26233d7334bed2bca4f06f539638ca6d24.1361853677.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-03-15 16:41:58 +00:00
Igor Mitsyanko
d7dfca0807 hw/sdhci: introduce standard SD host controller
Device model for standard SD Host Controller Interface (SDHCI) compliant with
version 2.00 of SD association specification.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28 18:23:14 +00:00
Gerd Hoffmann
6c83f81542 make usb devices configurable
Leave the core usb devices (usb hub, tablet, mouse, keyboard)
enabled unconditionally.  Make the other ones configurable.

Exceptions:
  - bluetooth: not qdevified yet, has a vl.c dependency because
    of that, thus disabling isn't as easy as not linking the
    object file.
  - smardcard: ccid-card-emulated depends on that one *and*
    CONFIG_SMARTCARD_NSS.  So it isn't a one-liner and comes
    as separate patch because of that.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-02-19 12:28:48 +01:00
Peter A. G. Crosthwaite
82a2499011 m25p80: Initial implementation of SPI flash device
Added device model for m25p80 style SPI flash family.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-10-10 11:13:32 +10:00
Andreas Färber
58f9b98f8a arm: Move some ARM devices into libhw
Avoids some unnecessary dependencies on cpu.h and prepares for
a future armeb-softmmu where most machines would not be built.

Defer touching the SoC devices since most have implicit or explicit
dependencies on the CPU.

Signed-off-by: Andreas Färber <andreas.faerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-13 16:13:02 +01:00
Blue Swirl
3d402831de vga: make Cirrus ISA device optional
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-22 07:28:23 +00:00
Alexander Graf
461d13d31c config: move ide core and pci to pci.mak
Every device that can do PCI should also be able to do IDE. So let's move
the IDE definitions over to pci.mak.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2010-12-17 16:11:02 +01:00
Paul Brook
f8f5cfbaa4 PCI config include
Split PCI config options into a separate file

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-11-27 00:06:13 +00:00
Blue Swirl
3d08ff698b Compile pflash_cfi01 only once
Push TARGET_WORDS_BIGENDIAN dependency to board level.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-29 19:23:56 +00:00
Blue Swirl
5f9fc5ad7e Compile pflash_cfi02 only once
Push TARGET_WORDS_BIGENDIAN dependency to board level.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-29 19:23:55 +00:00
Blue Swirl
f7736b91c4 Compile ide/core only once
Make win2k install hack unconditional as it is still restricted to
x86 only in vl.c.

Replace TARGET_PAGE_SIZE and 4096 with PAGE_SIZE.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-27 06:20:53 +00:00
Alexander Graf
b305b9d7d6 target-s390: Don't compile in virtio-pci
As soon as virtio-pci.c gets compiled and used on S390 the internal qdev magic
gets confused and tries to give us PCI devices instead of S390 virtio devices.

Since we don't have PCI on S390, we can safely not compile virtio-pci at all.

In order to do this I added a new config option "CONFIG_VIRTIO_PCI" that I
enabled for every platform except S390. Thanks to this the change should be a
complete nop for every other platform.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26 23:41:10 +01:00
Blue Swirl
2d48377a85 Compile serial only once
Push TARGET_WORDS_BIGENDIAN dependency to board level.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-21 19:47:11 +00:00
Paul Brook
23f2166d73 ARM defconfig fix
Tix typo in default-configs/arm-softmmu.mak

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-02-23 23:31:53 +00:00
Paul Brook
1dfe3943e9 DS1338 RTC
Implement MAXIM SD1338 RTC+NVRAM.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-11-22 21:27:40 +00:00
Paul Brook
f165b53a89 Built network devices once
Move some generic NICS into libhw, and build them for ARM targets.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-11-19 16:42:45 +00:00
Juan Quintela
c62c4551b8 Only compile ssi when one target uses it
Patchworks-ID: 35221
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-08 21:17:17 -05:00
Juan Quintela
93a604004a Only compile ssi-sd when one target uses it
Patchworks-ID: 35220
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-08 21:17:17 -05:00