edgar_igl
c7d0569543
CRIS: Do post-increment without going via T0.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4304 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03 06:54:52 +00:00
edgar_igl
b41f7df018
CRIS updates:
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* Support both the I and D MMUs and improve the accuracy of the MMU model.
* Handle the automatic user/kernel stack pointer switching when leaving or entering user mode.
* Move the CCS evaluation into helper funcs.
* Make sure user-mode cannot change flags only writeable in kernel mode.
* More conversion of the translator into TCG.
* Handle exceptions while in a delayslot.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-02 22:16:17 +00:00
aurel32
d2856f1ad4
Factorize code in translate.c
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(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:32:32 +00:00
aurel32
ca10f86763
Remove osdep.c/qemu-img code duplication
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(Kevin Wolf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 21:35:42 +00:00
edgar_igl
a825e703ee
More TCG conversions for CRIS.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4071 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 16:51:58 +00:00
edgar_igl
3157a0a93b
More TCG conversions for CRIS.
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* Bit swap insn (bitwise not, endian swap and bit reverse).
* Muls and mulu.
* Extended arithmetics.
* Parts of the condition code handling.
* Use tcg_const_tl.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4069 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 20:45:05 +00:00
edgar_igl
54728ac6db
Simplified some dead extended arith code after search and replace.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4066 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 09:13:04 +00:00
edgar_igl
05ba7d5f34
A first small step to convert the CRIS translator to TCG.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4057 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 01:11:25 +00:00
edgar_igl
4f400ab520
Cut the translation block after translating a break insn. This avoids an issue where QEMU finds an illegal CRIS insn while the guest is returning through a signal return trampoline.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3997 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-28 09:37:58 +00:00
edgar_igl
9004627f9b
More consistent naming for CRIS register-number macros.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-28 08:28:32 +00:00
edgar_igl
5d4a534dec
Silently ignore CRIS cache flushes, instead of aborting due to unknown insn.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3990 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-25 09:58:22 +00:00
bellard
57fec1fee9
use the TCG code generator
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
balrog
fd56059fb6
Optimize clear insns by treating support reg P0 specially and
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add missing micro-op RETURN's (Edgar E. Iglesias).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3913 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-14 03:18:30 +00:00
bellard
aaed909a49
added cpu_model parameter to cpu_init()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
ths
8170028d75
CRIS instruction translation, by Edgar E. Iglesias.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3358 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 12:49:08 +00:00
