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Author	SHA1	Message	Date
Paolo Bonzini	a62ed5d106	hw/net/can: interrupt cleanup Define two functions to update the interrupt state, and call them on loadvm. This removes the need to migrate the state as part of vmstate_kvaser_pci. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>	2018-02-13 11:44:13 +01:00
Pavel Pisa	733210e754	hw/net/can: SJA1000 chip register level emulation for QEMU The core SJA1000 support is independent of following patches which map SJA1000 chip to PCI boards. The work is based on Jin Yang GSoC 2013 work funded by Google and mentored in frame of RTEMS project GSoC slot donated to QEMU. Rewritten for QEMU-2.0+ versions and architecture cleanup by Pavel Pisa (Czech Technical University in Prague). Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>	2018-02-13 11:44:13 +01:00

Author

SHA1

Message

Date

Paolo Bonzini

a62ed5d106

hw/net/can: interrupt cleanup

Define two functions to update the interrupt state, and call them
on loadvm.  This removes the need to migrate the state as part of
vmstate_kvaser_pci.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2018-02-13 11:44:13 +01:00

Pavel Pisa

733210e754

hw/net/can: SJA1000 chip register level emulation for QEMU

The core SJA1000 support is independent of following
patches which map SJA1000 chip to PCI boards.

The work is based on Jin Yang GSoC 2013 work funded
by Google and mentored in frame of RTEMS project GSoC
slot donated to QEMU.

Rewritten for QEMU-2.0+ versions and architecture cleanup
by Pavel Pisa (Czech Technical University in Prague).

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2018-02-13 11:44:13 +01:00

2 Commits