malc
f60d2728cc
Fix smsw for x86_64 guest and bigendian host case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 15:51:14 +00:00
aurel32
32938e127f
target-i386: Fix jmp im on x86_64 when executing 32-bit code
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When running grub-install (32-bit) on an x86_64 Linux system in qemu, it
hangs on a pagefault forever, because an integer overflow occurs on the
IP on "jmp im". This patch masks overflows for 32 bit IPs on a 64 bit
system, just like it is done for 16 bit IPs already.
Using this patch, x86_64 openSUSE installation works again.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Kevin Wolf <kwolf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5963 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10 15:02:16 +00:00
aurel32
0b97134b29
target-i386: fix CVE-2007-1322
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The icebp instruction can be abused to terminate the emulation,
resulting in denial of service.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5921 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 18:15:36 +00:00
aliguori
c0ce998e94
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
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This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
aliguori
a1d1bb3101
Refactor and enhance break/watchpoint API (Jan Kiszka)
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This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.
First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.
Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
pbrook
a7812ae412
TCG variable type checking.
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Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
balrog
000cacf6f9
Fix crc32w decoding, fix a constant width in blendvpd.
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Forced the constant's width to long long so that it doesn't overflow,
problem spotted by C. W. Betts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5417 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04 11:33:52 +00:00
balrog
fdb0d09d02
x86 "popcnt" affects flags.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5412 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04 03:32:00 +00:00
balrog
222a3336ec
Implement SSE4.1, SSE4.2 (x86).
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This adds support for CPUID_EXT_SSE41, CPUID_EXT_SSE42, CPUID_EXT_POPCNT
extensions. Most instructions haven't been tested yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5411 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04 03:27:44 +00:00
balrog
6dc2d0daee
x86 pextrw destination operand can be r64.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5367 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-01 00:14:39 +00:00
balrog
2436b61a6b
SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).
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On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch
makes both 64-bit aware and enables them for Intel CPUs.
Add cpu save/load for 64-bit wide sysenter variables.
Signed-off-by: Alexander Graf <agraf@suse.de>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5318 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 18:16:18 +00:00
balrog
4242b1bd8a
Implement x86 SSSE3 instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5315 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 18:01:46 +00:00
ths
2cfc5f17d3
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 18:01:29 +00:00
bellard
28e1071183
fix cvtsq2s[sd] (Juergen Lock)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4856 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-07 20:25:41 +00:00
pbrook
d70040bcae
Re-add static qualifier. Fix annother occurance of "const static".
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4850 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-05 17:03:54 +00:00
pbrook
efade670fe
Fix rdtsc instruction counting.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4810 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 17:51:26 +00:00
pbrook
2e70f6efa8
Add instruction counter.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 01:03:05 +00:00
bellard
94451178b6
HLT, MWAIT and MONITOR insn fixes (initial patch by Alexander Graf)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4746 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-18 09:32:32 +00:00
bellard
ec9d6075b4
undocumented 0x82 opcode is invalid in 64 bit code
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4687 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-06 12:54:30 +00:00
bellard
9575cb9493
fixed exceptions for cpuid and invlpg
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4664 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04 17:12:40 +00:00
bellard
db620f46a8
reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04 17:02:19 +00:00
bellard
914178d34b
32 bit SVM fixes - INVLPG and INVLPGA updates
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4660 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04 13:53:05 +00:00
bellard
872929aa59
SVM rework
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 16:16:54 +00:00
bellard
2a449d1492
fixed x86_64 regression
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4586 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 21:01:05 +00:00
bellard
1e4840bf40
transformed TN into temporaries - add local temporaries usage when needed - optimized fcmovX
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4577 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 17:26:41 +00:00
pbrook
cb63669a54
Fix ARM conditional branch bug.
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Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:22:00 +00:00
bellard
70cff25e78
use debug_insn_start to have nicer debug traces
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4532 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 17:00:49 +00:00
bellard
437a88a51c
proper helper definition registering (all targets must do that)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4530 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 16:11:04 +00:00
bellard
c1c379686f
optimization of shifts by a constant
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4524 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 12:36:31 +00:00
bellard
12e26b75d4
lahf/sahf cpuid test
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4523 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 10:13:38 +00:00
bellard
1b9d9ebb8a
cmpxchg8b fix - added cmpxchg16b
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4522 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 09:52:38 +00:00
bellard
1130328ecb
cmpxchg 64 bit fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4521 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 09:36:08 +00:00
bellard
8e1c85e372
converted conditional jumps, SET and CMOVx to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4518 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 19:16:45 +00:00
bellard
651ba608e2
converted env access to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4516 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 17:16:11 +00:00
bellard
bd7a7b33df
convert eflags manipulation insns to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4515 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 17:07:20 +00:00
bellard
3bd7da9e18
convert remaining segment handling to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4514 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:34:06 +00:00
bellard
cec6843e87
converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LAR
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4513 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:25:27 +00:00
bellard
839bca8467
suppressed no longer used ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4511 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:34:27 +00:00
bellard
07be379fb1
converted INTO/CMPXCHG8B to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4510 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:29:45 +00:00
bellard
9d0763c4c0
converted BCD ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4509 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:24:30 +00:00
bellard
0211e5aff9
converted MUL/IMUL to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4508 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 10:12:54 +00:00
bellard
6e0d8677cb
converted string OPs and LOOP insns to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4494 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 19:28:26 +00:00
bellard
cd31fefaf2
fixed INC/DEC condition codes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4493 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 19:19:57 +00:00
bellard
e108dd01ce
converted sign extension ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4481 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 19:24:07 +00:00
bellard
bbf662ee31
MONITOR insn address generation fix - converted XLAT to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4479 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 19:05:28 +00:00
bellard
6191b05901
BSR/BSF TCG conversion
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4477 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 18:44:58 +00:00
bellard
f484d38622
converted bit test operations to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4473 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 16:10:38 +00:00
bellard
cad3a37d3e
converted adc, sbb, cmpxchg to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4471 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 13:50:02 +00:00
bellard
b6abf97df1
converted condition code supprot to TCG - converted shift ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4470 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:44:31 +00:00
bellard
b8b6a50b55
converted more helpers to TCG - fixed some SVM issues
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4459 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-15 16:46:30 +00:00