x86 definitions (especially CPUState uses) prevent many files from
being compiled within libhw.
Move x86 specific declarations (APIC stuff) to a separate file.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
On hosts without high-res timers it is impossible to inject rtc interrupt
faster then 1kHz. Windows sometimes configures RTC to generate 1kHz
interrupts, so we can't inject missed interrupts when running on such
hosts. Always injecting an interrupt on REG_C read is also not an option
since Windows wait for REG_C to become zero with interrupt disabled
during boot. This patch uses mixed approach: accelerate timer + inject
up to 1000 interrupts on REG_C read.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
It was used for Acer Pica 61 emulation, removed in 2008
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Like qdev_init(), but terminate program via hw_error() instead of
returning an error value.
Use it instead of qdev_init() where terminating the program on failure
is okay, either because it's during machine construction, or because
we know that failure can't happen.
Because relying in the latter is somewhat unclean, and the former is
not always obvious, it would be nice to go back to qdev_init() in the
not-so-obvious cases, only with proper error handling. I'm leaving
that for another day, because it involves making sure that error
values are properly checked by all callers.
Patchworks-ID: 35168
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Switch RTC emulations to the new host_clock instead of vm_clock by
default. This has the advantage that the emulated RTC will follow
automatically the host time while it might be tuned via NTP. vm_clock
can still be selected by passing '-rtc clock=vm' on the command line.
Note that some RTC emulations (at least M48T59) already use the host
time unconditionally while others (namely MC146818) do not. This patch
introduces the required infrastructure for selecting the base clock but
only converts MC146818 for now.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b72.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
The RTC emulation does not set the IRQ flags independent of the IRQ enable bits.
The original MC146818A datasheet from 1984 notes:
"flag bits in Register C [...] are set independent of the
state of the corresponding enable bits in Register B"
Similar sections can be found in newer documentation e.g. in rtc82885.
Qemu and Bochs set the IRQ flags only if they are enabled,
which breaks drivers polling on them.
The following patch corrects this for the update-ended-flag in Qemu only.
It does not fix the handling of the other flags.
Signed-off-by: Bernhard Kauer <kauer@tudos.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This reverts commit 8217606e6e (and
updates later added users of qemu_register_reset), we solved the
problem it originally addressed less invasively.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
The parameter is always zero except when registering the three internal
io regions (ROM, unassigned, notdirty). Remove the parameter to reduce
the API's power, thus facilitating future change.
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
On reset:
Periodic Interrupt Enable (PIE) bit is cleared to zero
Alarm Interrupt Enable (AIE) bit is cleared to zero
Update ended Interrupt Flag (UF) bit is cleared to zero
Interrupt Request status Flag (IRQF) bit is cleared to zero
Periodic Interrupt Flag (PF) bit is cleared to zero
Alarm Interrupt Flag (AF) bit is cleared to zero
Square Wave output Enable (SQWE) zero
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Currently IRQ are reinjected as soon as they are acknowledged to
the RTC, but Windows sometimes do acknowledgement in a loop with
global interrupt disabled waiting for interrupt to be cleared and
it does not mask RTC vector in PIC/APIC while doing this. In such
situation interrupt injection always fails and RTC interrupt is never
cleared.
Instead of reinjecting coalesced IRQs on acknowledgement the patch below
reinjects them by accelerating RTC clock a bit. This way RTC interrupt
is not constantly raced after coalesced interrupt.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7231 c046a42c-6fe2-441c-8c8c-71466251a162
This is necessary for es40 as the sqw output is directly connected to the
core chipset.
Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7031 c046a42c-6fe2-441c-8c8c-71466251a162
On the MIPS Magnum, the time that is held in the RTC's NVRAM should be
relative to midnight on 1980-01-01. This patch adds an extra parameter
to rtc_init(), allowing different epochs to be used. For the Magnum,
1980 is specified, and for all other machines, 2000 is specified.
I've not modified the handling of the century byte, as with an epoch of
1980 and a year of 2009, one could argue that it should hold either
0, 1, 19 or 20. NT 3.50 on MIPS does not read the century byte.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6429 c046a42c-6fe2-441c-8c8c-71466251a162
After my last patch to fix interrupt coalescing was rejected
on the basis that it is too intrusive we decided to make the
fix much more localized and only fix the problem for RTC time
source. Unfortunately it is impossible to fix the problem entirely
inside RTC code like Andrzej proposed since Windows reads RTC
register C more then once on each time interrupt so it is impossible
to count reliably how many interrupt windows actually handled.
Proposed solution is localized to I386 target and is disabled by
default. To enable it "-rtc-td-hack" flag should be used.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6320 c046a42c-6fe2-441c-8c8c-71466251a162
According to mc146818 specification, Day of Week register (#6) is between 1
and 7, 1 representing Sunday. According C specification, tm_wday field in
struct tm is between 0 and 6, 0 representing Sunday.
Bit 2 of register B (#11) is named DM (data mode) and specifies if RTC
stores values in BCD or in binary form.
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6310 c046a42c-6fe2-441c-8c8c-71466251a162
This patch adds HPET emulation. It can be disabled with -disable-hpet. An hpet
provides a more finely granular clocksource than otherwise available on PC.
This means that latency-dependent applications (e.g. multimedia) will generally
be smoother when using the HPET.
Signed-off-by: Beth Kon <eak@us.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6081 c046a42c-6fe2-441c-8c8c-71466251a162
