This message was printing out the data in decimal only, which is not
very friendly to the debugging developer. Add hex variant in
parenthesis to make it consistent with other similar messages in this
module.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: d624179649137832eaa8caa263ef9589b4395d5e.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This interrupt is not risen after the last block is written to sd. It
is mutually exclusive with the end of transfer conditions. Fix.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Message-id: 7ca9fd3e03ce1bec94aff08f607c15a0ec3d3371.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The data_count variable was being reset on every transfer, including
DMA transfer resumptions. This is incorrect, it should only be set
on a new command.
Manifests as a bug when using ADMA and there is a timer delay between
ADMA frames where the fifo is left in a non empty state.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Message-id: 15a98609cc32315211b0963091a8efd67522e160.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
