disas/libvixl: Fix wrong format strings
When the compiler is told to check the arguments of AppendToOutput, it reports several errors of this kind: error: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘int64_t {aka long int}’ [-Werror=format] Fix those bugs by using the correct format strings with PRId64, PRIx64. Signed-off-by: Stefan Weil <sw@weilnetz.de> Message-id: 1403113751-19799-1-git-send-email-sw@weilnetz.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1369,7 +1369,7 @@ int Disassembler::SubstituteImmediateField(Instruction* instr,
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VIXL_ASSERT(format[5] == 'L');
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AppendToOutput("#0x%" PRIx64, instr->ImmMoveWide());
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if (instr->ShiftMoveWide() > 0) {
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AppendToOutput(", lsl #%d", 16 * instr->ShiftMoveWide());
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AppendToOutput(", lsl #%" PRId64, 16 * instr->ShiftMoveWide());
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}
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}
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return 8;
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@ -1418,7 +1418,7 @@ int Disassembler::SubstituteImmediateField(Instruction* instr,
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}
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case 'F': { // IFPSingle, IFPDouble or IFPFBits.
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if (format[3] == 'F') { // IFPFbits.
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AppendToOutput("#%d", 64 - instr->FPScale());
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AppendToOutput("#%" PRId64, 64 - instr->FPScale());
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return 8;
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} else {
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AppendToOutput("#0x%" PRIx64 " (%.4f)", instr->ImmFP(),
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@ -1439,23 +1439,23 @@ int Disassembler::SubstituteImmediateField(Instruction* instr,
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return 5;
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}
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case 'P': { // IP - Conditional compare.
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AppendToOutput("#%d", instr->ImmCondCmp());
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AppendToOutput("#%" PRId64, instr->ImmCondCmp());
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return 2;
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}
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case 'B': { // Bitfields.
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return SubstituteBitfieldImmediateField(instr, format);
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}
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case 'E': { // IExtract.
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AppendToOutput("#%d", instr->ImmS());
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AppendToOutput("#%" PRId64, instr->ImmS());
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return 8;
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}
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case 'S': { // IS - Test and branch bit.
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AppendToOutput("#%d", (instr->ImmTestBranchBit5() << 5) |
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AppendToOutput("#%" PRId64, (instr->ImmTestBranchBit5() << 5) |
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instr->ImmTestBranchBit40());
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return 2;
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}
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case 'D': { // IDebug - HLT and BRK instructions.
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AppendToOutput("#0x%x", instr->ImmException());
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AppendToOutput("#0x%" PRIx64, instr->ImmException());
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return 6;
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}
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default: {
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@ -1626,12 +1626,12 @@ int Disassembler::SubstituteExtendField(Instruction* instr,
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(((instr->ExtendMode() == UXTW) && (instr->SixtyFourBits() == 0)) ||
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(instr->ExtendMode() == UXTX))) {
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if (instr->ImmExtendShift() > 0) {
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AppendToOutput(", lsl #%d", instr->ImmExtendShift());
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AppendToOutput(", lsl #%" PRId64, instr->ImmExtendShift());
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}
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} else {
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AppendToOutput(", %s", extend_mode[instr->ExtendMode()]);
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if (instr->ImmExtendShift() > 0) {
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AppendToOutput(" #%d", instr->ImmExtendShift());
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AppendToOutput(" #%" PRId64, instr->ImmExtendShift());
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}
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}
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return 3;
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@ -1660,7 +1660,7 @@ int Disassembler::SubstituteLSRegOffsetField(Instruction* instr,
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if (!((ext == UXTX) && (shift == 0))) {
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AppendToOutput(", %s", extend_mode[ext]);
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if (shift != 0) {
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AppendToOutput(" #%d", instr->SizeLS());
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AppendToOutput(" #%" PRId64, instr->SizeLS());
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}
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}
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return 9;
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