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hw/isa/piix3: QOM'ify PCI device creation and wiring

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PCI interrupt wiring was performed in create() functions which are
obsolete. Move these tasks into QOM functions to modernize the code.

In order to avoid duplicate checking for xen_enabled() the realize
methods are now split.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-10-shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Bernhard Beschow 2022-06-03 20:50:43 +02:00 committed by Philippe Mathieu-Daudé
parent 5bf26b9393
commit fe3055d292
1 changed files with 45 additions and 22 deletions
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65
hw/isa/piix3.c
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@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/range.h"
#include "qapi/error.h"
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/isa/isa.h"
@ -278,7 +279,7 @@ static const MemoryRegionOps rcr_ops = {
.endianness = DEVICE_LITTLE_ENDIAN
};
static void piix3_realize(PCIDevice *dev, Error **errp)
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
{
PIIX3State *d = PIIX3_PCI_DEVICE(dev);
@ -317,7 +318,6 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data)
dc->desc = "ISA bridge";
dc->vmsd = &vmstate_piix3;
dc->hotpluggable = false;
k->realize = piix3_realize;
k->vendor_id = PCI_VENDOR_ID_INTEL;
/* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
@ -343,11 +343,28 @@ static const TypeInfo piix3_pci_type_info = {
},
};
static void piix3_realize(PCIDevice *dev, Error **errp)
{
ERRP_GUARD();
PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
pci_piix3_realize(dev, errp);
if (*errp) {
return;
}
pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq,
piix3, PIIX_NUM_PIRQS);
pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
};
static void piix3_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config;
k->realize = piix3_realize;
}
static const TypeInfo piix3_info = {
@ -356,11 +373,33 @@ static const TypeInfo piix3_info = {
.class_init = piix3_class_init,
};
static void piix3_xen_realize(PCIDevice *dev, Error **errp)
{
ERRP_GUARD();
PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
pci_piix3_realize(dev, errp);
if (*errp) {
return;
}
/*
* Xen supports additional interrupt routes from the PCI devices to
* the IOAPIC: the four pins of each PCI device on the bus are also
* connected to the IOAPIC directly.
* These additional routes can be discovered through ACPI.
*/
pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
piix3, XEN_PIIX_NUM_PIRQS);
};
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config_xen;
k->realize = piix3_xen_realize;
};
static const TypeInfo piix3_xen_info = {
@ -382,27 +421,11 @@ PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus)
{
PIIX3State *piix3;
PCIDevice *pci_dev;
const char *type = xen_enabled() ? TYPE_PIIX3_XEN_DEVICE
: TYPE_PIIX3_DEVICE;
/*
* Xen supports additional interrupt routes from the PCI devices to
* the IOAPIC: the four pins of each PCI device on the bus are also
* connected to the IOAPIC directly.
* These additional routes can be discovered through ACPI.
*/
if (xen_enabled()) {
pci_dev = pci_create_simple_multifunction(pci_bus, -1, true,
TYPE_PIIX3_XEN_DEVICE);
pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type);
piix3 = PIIX3_PCI_DEVICE(pci_dev);
pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
piix3, XEN_PIIX_NUM_PIRQS);
} else {
pci_dev = pci_create_simple_multifunction(pci_bus, -1, true,
TYPE_PIIX3_DEVICE);
piix3 = PIIX3_PCI_DEVICE(pci_dev);
pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq,
piix3, PIIX_NUM_PIRQS);
pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
}
*isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
return piix3;