target/riscv/tcg: update priv_ver on user_set extensions
We'll add a new bare CPU type that won't have any default priv_ver. This means that the CPU will default to priv_ver = 0, i.e. 1.10.0. At the same we'll allow these CPUs to enable extensions at will, but then, if the extension has a priv_ver newer than 1.10, we'll end up disabling it. Users will then need to manually set priv_ver to something other than 1.10 to enable the extensions they want, which is not ideal. Change the setter() of extensions to allow user enabled extensions to bump the priv_ver of the CPU. This will make it convenient for users to enable extensions for CPUs that doesn't set a default priv_ver. This change does not affect any existing CPU: vendor CPUs does not allow extensions to be enabled, and generic CPUs are already set to priv_ver LATEST. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20231218125334.37184-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -114,6 +114,26 @@ static int cpu_cfg_ext_get_min_version(uint32_t ext_offset)
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g_assert_not_reached();
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}
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static void cpu_bump_multi_ext_priv_ver(CPURISCVState *env,
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uint32_t ext_offset)
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{
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int ext_priv_ver;
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if (env->priv_ver == PRIV_VERSION_LATEST) {
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return;
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}
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ext_priv_ver = cpu_cfg_ext_get_min_version(ext_offset);
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if (env->priv_ver < ext_priv_ver) {
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/*
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* Note: the 'priv_spec' command line option, if present,
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* will take precedence over this priv_ver bump.
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*/
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env->priv_ver = ext_priv_ver;
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}
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}
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static void cpu_cfg_ext_auto_update(RISCVCPU *cpu, uint32_t ext_offset,
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bool value)
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{
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@ -762,6 +782,14 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *v, const char *name,
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return;
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}
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if (misa_bit == RVH && env->priv_ver < PRIV_VERSION_1_12_0) {
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/*
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* Note: the 'priv_spec' command line option, if present,
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* will take precedence over this priv_ver bump.
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*/
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env->priv_ver = PRIV_VERSION_1_12_0;
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}
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env->misa_ext |= misa_bit;
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env->misa_ext_mask |= misa_bit;
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} else {
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@ -891,6 +919,10 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor *v, const char *name,
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return;
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}
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if (value) {
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cpu_bump_multi_ext_priv_ver(&cpu->env, multi_ext_cfg->offset);
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}
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isa_ext_update_enabled(cpu, multi_ext_cfg->offset, value);
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}
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