From fd6f446a5e34f160cbdc9bb300d326cec0eca6c6 Mon Sep 17 00:00:00 2001 From: Bastian Koppelmann Date: Wed, 14 Jun 2023 12:00:33 +0200 Subject: [PATCH] target/tricore: Add popcnt.w insn reported in https://gitlab.com/qemu-project/qemu/-/issues/1667 Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann Message-Id: <20230614100039.1337971-3-kbastian@mail.uni-paderborn.de> --- target/tricore/translate.c | 7 +++++++ target/tricore/tricore-opcodes.h | 1 + 2 files changed, 8 insertions(+) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index cd33a1dcdd..26b284bcec 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -6197,6 +6197,13 @@ static void decode_rr_divide(DisasContext *ctx) generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); } break; + case OPC2_32_RR_POPCNT_W: + if (has_feature(ctx, TRICORE_FEATURE_162)) { + tcg_gen_ctpop_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); + } else { + generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); + } + break; case OPC2_32_RR_DIV: if (has_feature(ctx, TRICORE_FEATURE_16)) { GEN_HELPER_RR(divide, cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r1], diff --git a/target/tricore/tricore-opcodes.h b/target/tricore/tricore-opcodes.h index f7135f183d..59aa39a7a5 100644 --- a/target/tricore/tricore-opcodes.h +++ b/target/tricore/tricore-opcodes.h @@ -1133,6 +1133,7 @@ enum { OPC2_32_RR_PARITY = 0x02, OPC2_32_RR_UNPACK = 0x08, OPC2_32_RR_CRC32 = 0x03, + OPC2_32_RR_POPCNT_W = 0x22, /* 1.6.2 only */ OPC2_32_RR_DIV = 0x20, OPC2_32_RR_DIV_U = 0x21, OPC2_32_RR_MUL_F = 0x04,