hw/misc/bcm2835_cprman: implement clock mux behaviour
A clock mux can be configured to select one of its 10 sources through the CM_CTL register. It also embeds yet another clock divider, composed of an integer part and a fractional part. The number of bits of each part is mux dependent. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -231,15 +231,66 @@ static const TypeInfo cprman_pll_channel_info = {
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/* clock mux */
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static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
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{
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return FIELD_EX32(*mux->reg_ctl, CM_CLOCKx_CTL, ENABLE);
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}
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static void clock_mux_update(CprmanClockMuxState *mux)
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{
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clock_update(mux->out, 0);
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uint64_t freq;
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uint32_t div, src = FIELD_EX32(*mux->reg_ctl, CM_CLOCKx_CTL, SRC);
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bool enabled = clock_mux_is_enabled(mux);
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*mux->reg_ctl = FIELD_DP32(*mux->reg_ctl, CM_CLOCKx_CTL, BUSY, enabled);
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if (!enabled) {
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clock_update(mux->out, 0);
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return;
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}
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freq = clock_get_hz(mux->srcs[src]);
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if (mux->int_bits == 0 && mux->frac_bits == 0) {
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clock_update_hz(mux->out, freq);
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return;
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}
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/*
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* The divider has an integer and a fractional part. The size of each part
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* varies with the muxes (int_bits and frac_bits). Both parts are
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* concatenated, with the integer part always starting at bit 12.
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*
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* 31 12 11 0
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* ------------------------------
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* CM_DIV | | int | frac | |
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* ------------------------------
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* <-----> <------>
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* int_bits frac_bits
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*/
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div = extract32(*mux->reg_div,
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R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits,
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mux->int_bits + mux->frac_bits);
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if (!div) {
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clock_update(mux->out, 0);
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return;
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}
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freq = muldiv64(freq, 1 << mux->frac_bits, div);
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clock_update_hz(mux->out, freq);
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}
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static void clock_mux_src_update(void *opaque)
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{
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CprmanClockMuxState **backref = opaque;
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CprmanClockMuxState *s = *backref;
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CprmanClockMuxSource src = backref - s->backref;
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if (FIELD_EX32(*s->reg_ctl, CM_CLOCKx_CTL, SRC) != src) {
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return;
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}
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clock_mux_update(s);
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}
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