target/mips: Remove CPU_NANOMIPS32 definition
nanoMIPS not a CPU, but an ISA. The nanoMIPS ISA is already defined as ISA_NANOMIPS32. Remove this incorrect definition and update the single CPU implementing it, the I7200. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210112210152.2072996-3-f4bug@amsat.org>
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@ -486,8 +486,8 @@ const mips_def_t mips_defs[] =
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.CP1_fcr31 = (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008),
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.SEGBITS = 32,
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.PABITS = 32,
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.insn_flags = CPU_NANOMIPS32 | ASE_DSP | ASE_DSP_R2 | ASE_DSP_R3 |
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ASE_MT,
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.insn_flags = CPU_MIPS32R6 | ISA_NANOMIPS32 |
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ASE_DSP | ASE_DSP_R2 | ASE_DSP_R3 | ASE_MT,
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.mmu_type = MMU_TYPE_R4000,
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},
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#if defined(TARGET_MIPS64)
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@ -86,9 +86,6 @@
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#define CPU_MIPS32R6 (CPU_MIPS32R5 | ISA_MIPS_R6)
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#define CPU_MIPS64R6 (CPU_MIPS64R5 | CPU_MIPS32R6)
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/* Wave Computing: "nanoMIPS" */
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#define CPU_NANOMIPS32 (CPU_MIPS32R6 | ISA_NANOMIPS32)
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#define CPU_LOONGSON3A (CPU_MIPS64R2 | INSN_LOONGSON3A | ASE_LMMI | ASE_LEXT)
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/*
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