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Hexagon (target/hexagon) Add support for v68/v69/v71/v73

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Add support for the ELF flags
Move target/hexagon/cpu.[ch] to be v73
Change the compiler flag used by "make check-tcg"

The decbin instruction is removed in Hexagon v73, so check the
version before trying to compile the instruction.

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230427224057.3766963-2-tsimpson@quicinc.com>
This commit is contained in:
Taylor Simpson 2023-04-27 15:40:49 -07:00
parent 278238505d
commit fc2622f660
7 changed files with 43 additions and 13 deletions
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2
configure vendored
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@ -1858,7 +1858,7 @@ fi
: ${cross_cc_armeb="$cross_cc_arm"}
: ${cross_cc_cflags_armeb="-mbig-endian"}
: ${cross_cc_hexagon="hexagon-unknown-linux-musl-clang"}
: ${cross_cc_cflags_hexagon="-mv67 -O2 -static"}
: ${cross_cc_cflags_hexagon="-mv73 -O2 -static"}
: ${cross_cc_cflags_i386="-m32"}
: ${cross_cc_cflags_ppc="-m32 -mbig-endian"}
: ${cross_cc_cflags_ppc64="-m64 -mbig-endian"}

13
linux-user/hexagon/target_elf.h
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@ -1,5 +1,5 @@
/*
* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -20,7 +20,7 @@
static inline const char *cpu_get_model(uint32_t eflags)
{
/* For now, treat anything newer than v5 as a v67 */
/* For now, treat anything newer than v5 as a v73 */
/* FIXME - Disable instructions that are newer than the specified arch */
if (eflags == 0x04 || /* v5 */
eflags == 0x05 || /* v55 */
@ -30,9 +30,14 @@ static inline const char *cpu_get_model(uint32_t eflags)
eflags == 0x65 || /* v65 */
eflags == 0x66 || /* v66 */
eflags == 0x67 || /* v67 */
eflags == 0x8067 /* v67t */
eflags == 0x8067 || /* v67t */
eflags == 0x68 || /* v68 */
eflags == 0x69 || /* v69 */
eflags == 0x71 || /* v71 */
eflags == 0x8071 || /* v71t */
eflags == 0x73 /* v73 */
) {
return "v67";
return "v73";
}
return "unknown";
}

8
target/hexagon/README
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@ -4,10 +4,10 @@ is a wide vector coprocessor designed for high performance computer vision,
image processing, machine learning, and other workloads.
The following versions of the Hexagon core are supported
Scalar core: v67
https://developer.qualcomm.com/downloads/qualcomm-hexagon-v67-programmer-s-reference-manual
HVX extension: v66
https://developer.qualcomm.com/downloads/qualcomm-hexagon-v66-hvx-programmer-s-reference-manual
Scalar core: v73
https://developer.qualcomm.com/downloads/qualcomm-hexagon-v73-programmers-reference-manual-rev-aa
HVX extension: v73
https://developer.qualcomm.com/downloads/qualcomm-hexagon-v73-hvx-programmers-reference-manual-rev-aa
We presented an overview of the project at the 2019 KVM Forum.
https://kvmforum2019.sched.com/event/Tmwc/qemu-hexagon-automatic-translation-of-the-isa-manual-pseudcode-to-tiny-code-instructions-of-a-vliw-architecture-niccolo-izzo-revng-taylor-simpson-qualcomm-innovation-center

14
target/hexagon/cpu.c
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@ -1,5 +1,5 @@
/*
* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -25,9 +25,11 @@
#include "fpu/softfloat-helpers.h"
#include "tcg/tcg.h"
static void hexagon_v67_cpu_init(Object *obj)
{
}
static void hexagon_v67_cpu_init(Object *obj) { }
static void hexagon_v68_cpu_init(Object *obj) { }
static void hexagon_v69_cpu_init(Object *obj) { }
static void hexagon_v71_cpu_init(Object *obj) { }
static void hexagon_v73_cpu_init(Object *obj) { }
static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
{
@ -382,6 +384,10 @@ static const TypeInfo hexagon_cpu_type_infos[] = {
.class_init = hexagon_cpu_class_init,
},
DEFINE_CPU(TYPE_HEXAGON_CPU_V67, hexagon_v67_cpu_init),
DEFINE_CPU(TYPE_HEXAGON_CPU_V68, hexagon_v68_cpu_init),
DEFINE_CPU(TYPE_HEXAGON_CPU_V69, hexagon_v69_cpu_init),
DEFINE_CPU(TYPE_HEXAGON_CPU_V71, hexagon_v71_cpu_init),
DEFINE_CPU(TYPE_HEXAGON_CPU_V73, hexagon_v73_cpu_init),
};
DEFINE_TYPES(hexagon_cpu_type_infos)

4
target/hexagon/cpu.h
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@ -43,6 +43,10 @@
#define CPU_RESOLVING_TYPE TYPE_HEXAGON_CPU
#define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
#define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME("v68")
#define TYPE_HEXAGON_CPU_V69 HEXAGON_CPU_TYPE_NAME("v69")
#define TYPE_HEXAGON_CPU_V71 HEXAGON_CPU_TYPE_NAME("v71")
#define TYPE_HEXAGON_CPU_V73 HEXAGON_CPU_TYPE_NAME("v73")
#define MMU_USER_IDX 0

3
tests/tcg/hexagon/Makefile.target
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@ -82,6 +82,9 @@ TESTS += $(HEX_TESTS)
usr: usr.c
$(CC) $(CFLAGS) -mv67t -O2 -Wno-inline-asm -Wno-expansion-to-defined $< -o $@ $(LDFLAGS)
# Build this test with -mv71 to exercise the CABAC instruction
misc: misc.c
$(CC) $(CFLAGS) -mv71 -O2 $< -o $@ $(LDFLAGS)
scatter_gather: CFLAGS += -mhvx
vector_add_int: CFLAGS += -mhvx -fvectorize
hvx_misc: hvx_misc.c hvx_misc.h

12
tests/tcg/hexagon/misc.c
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@ -18,6 +18,8 @@
#include <stdio.h>
#include <string.h>
#define CORE_HAS_CABAC (__HEXAGON_ARCH__ <= 71)
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
@ -245,6 +247,7 @@ static void check(int val, int expect)
}
}
#if CORE_HAS_CABAC
static void check64(long long val, long long expect)
{
if (val != expect) {
@ -252,6 +255,7 @@ static void check64(long long val, long long expect)
err++;
}
}
#endif
uint32_t init[10] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 };
uint32_t array[10];
@ -286,6 +290,7 @@ static long long creg_pair(int x, int y)
return retval;
}
#if CORE_HAS_CABAC
static long long decbin(long long x, long long y, int *pred)
{
long long retval;
@ -295,6 +300,7 @@ static long long decbin(long long x, long long y, int *pred)
: "r"(x), "r"(y));
return retval;
}
#endif
/* Check that predicates are auto-and'ed in a packet */
static int auto_and(void)
@ -388,8 +394,10 @@ void test_count_trailing_zeros_ones(void)
int main()
{
int res;
#if CORE_HAS_CABAC
long long res64;
int pred;
#endif
memcpy(array, init, sizeof(array));
S4_storerhnew_rr(array, 4, 0xffff);
@ -505,6 +513,7 @@ int main()
res = test_clrtnew(2, 7);
check(res, 7);
#if CORE_HAS_CABAC
res64 = decbin(0xf0f1f2f3f4f5f6f7LL, 0x7f6f5f4f3f2f1f0fLL, &pred);
check64(res64, 0x357980003700010cLL);
check(pred, 0);
@ -512,6 +521,9 @@ int main()
res64 = decbin(0xfLL, 0x1bLL, &pred);
check64(res64, 0x78000100LL);
check(pred, 1);
#else
puts("Skipping cabac tests");
#endif
res = auto_and();
check(res, 0);