target-lm32: QOM'ify CPU
Embed CPULM32State as first member of QOM LM32CPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc>
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@ -93,6 +93,7 @@ libobj-$(TARGET_SPARC64) += vis_helper.o
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libobj-$(CONFIG_NEED_MMU) += mmu.o
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libobj-$(CONFIG_NEED_MMU) += mmu.o
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libobj-$(TARGET_ARM) += neon_helper.o iwmmxt_helper.o
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libobj-$(TARGET_ARM) += neon_helper.o iwmmxt_helper.o
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libobj-$(TARGET_ARM) += cpu.o
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libobj-$(TARGET_ARM) += cpu.o
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libobj-$(TARGET_LM32) += cpu.o
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libobj-$(TARGET_S390X) += cpu.o
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libobj-$(TARGET_S390X) += cpu.o
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ifeq ($(TARGET_BASE_ARCH), sparc)
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ifeq ($(TARGET_BASE_ARCH), sparc)
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libobj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o
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libobj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o
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71
target-lm32/cpu-qom.h
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71
target-lm32/cpu-qom.h
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@ -0,0 +1,71 @@
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/*
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* QEMU LatticeMico32 CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_LM32_CPU_QOM_H
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#define QEMU_LM32_CPU_QOM_H
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#include "qemu/cpu.h"
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#include "cpu.h"
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#define TYPE_LM32_CPU "lm32-cpu"
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#define LM32_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(LM32CPUClass, (klass), TYPE_LM32_CPU)
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#define LM32_CPU(obj) \
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OBJECT_CHECK(LM32CPU, (obj), TYPE_LM32_CPU)
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#define LM32_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(LM32CPUClass, (obj), TYPE_LM32_CPU)
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/**
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* LM32CPUClass:
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* @parent_reset: The parent class' reset handler.
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*
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* A LatticeMico32 CPU model.
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*/
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typedef struct LM32CPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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void (*parent_reset)(CPUState *cpu);
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} LM32CPUClass;
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/**
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* LM32CPU:
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* @env: #CPULM32State
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*
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* A LatticeMico32 CPU.
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*/
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typedef struct LM32CPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPULM32State env;
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} LM32CPU;
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static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
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{
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return LM32_CPU(container_of(env, LM32CPU, env));
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}
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#define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
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#endif
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60
target-lm32/cpu.c
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60
target-lm32/cpu.c
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/*
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* QEMU LatticeMico32 CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "cpu-qom.h"
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#include "qemu-common.h"
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/* CPUClass::reset() */
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static void lm32_cpu_reset(CPUState *s)
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{
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LM32CPU *cpu = LM32_CPU(s);
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LM32CPUClass *lcc = LM32_CPU_GET_CLASS(cpu);
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CPULM32State *env = &cpu->env;
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lcc->parent_reset(s);
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cpu_state_reset(env);
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}
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static void lm32_cpu_class_init(ObjectClass *oc, void *data)
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{
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LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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lcc->parent_reset = cc->reset;
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cc->reset = lm32_cpu_reset;
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}
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static const TypeInfo lm32_cpu_type_info = {
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.name = TYPE_LM32_CPU,
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.parent = TYPE_CPU,
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.instance_size = sizeof(LM32CPU),
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.abstract = false,
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.class_size = sizeof(LM32CPUClass),
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.class_init = lm32_cpu_class_init,
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};
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static void lm32_cpu_register_types(void)
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{
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type_register_static(&lm32_cpu_type_info);
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}
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type_init(lm32_cpu_register_types)
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@ -184,6 +184,7 @@ struct CPULM32State {
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};
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};
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#include "cpu-qom.h"
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CPULM32State *cpu_lm32_init(const char *cpu_model);
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CPULM32State *cpu_lm32_init(const char *cpu_model);
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void cpu_lm32_list(FILE *f, fprintf_function cpu_fprintf);
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void cpu_lm32_list(FILE *f, fprintf_function cpu_fprintf);
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@ -194,6 +194,7 @@ static uint32_t cfg_by_def(const LM32Def *def)
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CPULM32State *cpu_lm32_init(const char *cpu_model)
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CPULM32State *cpu_lm32_init(const char *cpu_model)
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{
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{
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LM32CPU *cpu;
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CPULM32State *env;
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CPULM32State *env;
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const LM32Def *def;
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const LM32Def *def;
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static int tcg_initialized;
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static int tcg_initialized;
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@ -203,7 +204,8 @@ CPULM32State *cpu_lm32_init(const char *cpu_model)
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return NULL;
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return NULL;
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}
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}
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env = g_malloc0(sizeof(CPULM32State));
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cpu = LM32_CPU(object_new(TYPE_LM32_CPU));
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env = &cpu->env;
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env->features = def->features;
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env->features = def->features;
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env->num_bps = def->num_breakpoints;
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env->num_bps = def->num_breakpoints;
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