cris: Prepare for CRISv10.
* Add prefix flag and special reg. * Add interrupt lockout. * Add CC_OP_MSTEP. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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@ -497,7 +497,8 @@ int cpu_exec(CPUState *env1)
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}
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#elif defined(TARGET_CRIS)
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if (interrupt_request & CPU_INTERRUPT_HARD
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&& (env->pregs[PR_CCS] & I_FLAG)) {
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&& (env->pregs[PR_CCS] & I_FLAG)
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&& !env->locked_irq) {
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env->exception_index = EXCP_IRQ;
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do_interrupt(env);
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next_tb = 0;
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@ -49,6 +49,7 @@
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#define PR_WZ 4
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#define PR_EXS 5
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#define PR_EDA 6
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#define PR_PREFIX 6 /* On CRISv10 P6 is reserved, we use it as prefix. */
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#define PR_MOF 7
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#define PR_DZ 8
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#define PR_EBP 9
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@ -62,6 +63,7 @@
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/* CPU flags. */
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#define Q_FLAG 0x80000000
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#define M_FLAG 0x40000000
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#define PFIX_FLAG 0x800 /* CRISv10 Only. */
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#define S_FLAG 0x200
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#define R_FLAG 0x100
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#define P_FLAG 0x80
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@ -121,6 +123,8 @@ typedef struct CPUCRISState {
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/* X flag at the time of cc snapshot. */
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int cc_x;
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/* CRIS has certain insns that lockout interrupts. */
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int locked_irq;
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int interrupt_vector;
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int fault_vector;
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int trap_vector;
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@ -180,6 +184,7 @@ enum {
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CC_OP_MULS,
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CC_OP_MULU,
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CC_OP_DSTEP,
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CC_OP_MSTEP,
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CC_OP_BOUND,
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CC_OP_OR,
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@ -253,7 +258,8 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
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*pc = env->pc;
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*cs_base = 0;
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*flags = env->dslot |
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(env->pregs[PR_CCS] & (S_FLAG | P_FLAG | U_FLAG | X_FLAG));
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(env->pregs[PR_CCS] & (S_FLAG | P_FLAG | U_FLAG
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| X_FLAG | PFIX_FLAG));
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}
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#endif
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