hw/xen: set pci Atomic Ops requests for passthrough device

Make guest os access pci device control 2 reg for passthrough device
as struct XenPTRegInfo described in the file hw/xen/xen_pt.h.
/* reg read only field mask (ON:RO/ROS, OFF:other) */
uint32_t ro_mask;
/* reg emulate field mask (ON:emu, OFF:passthrough) */
uint32_t emu_mask;

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1196
Signed-off-by: Aaron Liu <Aaron.Liu@amd.com>
Signed-off-by: Ruili Ji <ruili.ji@amd.com>
Message-ID: <BL1PR12MB599341DC55BA53FE588DE14E9B7E9@BL1PR12MB5993.namprd12.prod.outlook.com>
Reviewed-by: Paul Durrant <paul@xen.org>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
This commit is contained in:
Ruili Ji 2022-09-06 14:09:41 +08:00 committed by Anthony PERARD
parent 99d6b11b5b
commit fb36fb9344

View File

@ -985,8 +985,8 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = {
.offset = 0x28, .offset = 0x28,
.size = 2, .size = 2,
.init_val = 0x0000, .init_val = 0x0000,
.ro_mask = 0xFFE0, .ro_mask = 0xFFA0,
.emu_mask = 0xFFFF, .emu_mask = 0xFFBF,
.init = xen_pt_devctrl2_reg_init, .init = xen_pt_devctrl2_reg_init,
.u.w.read = xen_pt_word_reg_read, .u.w.read = xen_pt_word_reg_read,
.u.w.write = xen_pt_word_reg_write, .u.w.write = xen_pt_word_reg_write,