tcg/loongarch64: Implement the memory barrier op

Signed-off-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211221054105.178795-9-git@xen0n.name>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
WANG Xuerui 2021-12-21 13:40:42 +08:00 committed by Richard Henderson
parent bf8c1c8140
commit fae2361dc9

View File

@ -234,3 +234,35 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
g_assert_not_reached(); g_assert_not_reached();
} }
} }
#include "tcg-insn-defs.c.inc"
/*
* TCG intrinsics
*/
static void tcg_out_mb(TCGContext *s, TCGArg a0)
{
/* Baseline LoongArch only has the full barrier, unfortunately. */
tcg_out_opc_dbar(s, 0);
}
/*
* Entry-points
*/
static void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg args[TCG_MAX_OP_ARGS],
const int const_args[TCG_MAX_OP_ARGS])
{
TCGArg a0 = args[0];
switch (opc) {
case INDEX_op_mb:
tcg_out_mb(s, a0);
break;
default:
g_assert_not_reached();
}
}