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sifive_e: Register "revb" as class property

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Class properties make QOM introspection simpler and easier, as
they don't require an object to be instantiated.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20200921221045.699690-24-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
Eduardo Habkost 2020-09-21 18:10:44 -04:00
parent 53f6474626
commit fabbcbd953
1 changed files with 6 additions and 5 deletions
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11
hw/riscv/sifive_e.c
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@ -137,11 +137,6 @@ static void sifive_e_machine_instance_init(Object *obj)
SiFiveEState *s = RISCV_E_MACHINE(obj); SiFiveEState *s = RISCV_E_MACHINE(obj);
s->revb = false; s->revb = false;
object_property_add_bool(obj, "revb", sifive_e_machine_get_revb,
sifive_e_machine_set_revb);
object_property_set_description(obj, "revb",
"Set on to tell QEMU that it should model "
"the revB HiFive1 board");
} }
static void sifive_e_machine_class_init(ObjectClass *oc, void *data) static void sifive_e_machine_class_init(ObjectClass *oc, void *data)
@ -152,6 +147,12 @@ static void sifive_e_machine_class_init(ObjectClass *oc, void *data)
mc->init = sifive_e_machine_init; mc->init = sifive_e_machine_init;
mc->max_cpus = 1; mc->max_cpus = 1;
mc->default_cpu_type = SIFIVE_E_CPU; mc->default_cpu_type = SIFIVE_E_CPU;
object_class_property_add_bool(oc, "revb", sifive_e_machine_get_revb,
sifive_e_machine_set_revb);
object_class_property_set_description(oc, "revb",
"Set on to tell QEMU that it should model "
"the revB HiFive1 board");
} }
static const TypeInfo sifive_e_machine_typeinfo = { static const TypeInfo sifive_e_machine_typeinfo = {