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target/mips: Remove CPUMIPSState::CP0_SAARI field

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Remove the unused CP0_SAARI register.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240209090513.9401-10-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-02-09 08:55:48 +01:00
parent ee58fddcbb
commit fa82742621
2 changed files with 1 additions and 2 deletions
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1
target/mips/cpu.h
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@ -747,7 +747,6 @@ typedef struct CPUArchState {
* CP0 Register 9
*/
int32_t CP0_Count;
uint32_t CP0_SAARI;
#define CP0SAARI_TARGET 0 /* 5..0 */
#define CP0SAAR_BASE 12 /* 43..12 */
#define CP0SAAR_SIZE 1 /* 5..1 */

2
target/mips/sysemu/machine.c
View File

@ -281,7 +281,7 @@ const VMStateDescription vmstate_mips_cpu = {
VMSTATE_UINT32(env.CP0_BadInstrP, MIPSCPU),
VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU),
VMSTATE_INT32(env.CP0_Count, MIPSCPU),
VMSTATE_UINT32(env.CP0_SAARI, MIPSCPU),
VMSTATE_UNUSED(sizeof(uint32_t)), /* was CP0_SAARI */
VMSTATE_UNUSED(2 * sizeof(uint64_t)), /* was CP0_SAAR[2] */
VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU),
VMSTATE_INT32(env.CP0_Compare, MIPSCPU),