ppc/pnv: Introduce a PnvCore reset handler

in which individual CPUs are reset. It will ease the introduction of
future change reseting the interrupt presenter from the CPU reset
handler.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <20191022163812.330-4-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2019-10-22 18:38:08 +02:00 committed by David Gibson
parent d1f2b4691a
commit fa06541b5d

View File

@ -40,9 +40,8 @@ static const char *pnv_core_cpu_typename(PnvCore *pc)
return cpu_type;
}
static void pnv_cpu_reset(void *opaque)
static void pnv_core_cpu_reset(PowerPCCPU *cpu)
{
PowerPCCPU *cpu = opaque;
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
@ -192,8 +191,17 @@ static void pnv_realize_vcpu(PowerPCCPU *cpu, PnvChip *chip, Error **errp)
/* Set time-base frequency to 512 MHz */
cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ);
}
qemu_register_reset(pnv_cpu_reset, cpu);
static void pnv_core_reset(void *dev)
{
CPUCore *cc = CPU_CORE(dev);
PnvCore *pc = PNV_CORE(dev);
int i;
for (i = 0; i < cc->nr_threads; i++) {
pnv_core_cpu_reset(pc->threads[i]);
}
}
static void pnv_core_realize(DeviceState *dev, Error **errp)
@ -244,6 +252,8 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id);
pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), pcc->xscom_ops,
pc, name, PNV_XSCOM_EX_SIZE);
qemu_register_reset(pnv_core_reset, pc);
return;
err:
@ -259,7 +269,6 @@ static void pnv_unrealize_vcpu(PowerPCCPU *cpu)
{
PnvCPUState *pnv_cpu = pnv_cpu_state(cpu);
qemu_unregister_reset(pnv_cpu_reset, cpu);
object_unparent(OBJECT(pnv_cpu_state(cpu)->intc));
cpu_remove_sync(CPU(cpu));
cpu->machine_data = NULL;
@ -273,6 +282,8 @@ static void pnv_core_unrealize(DeviceState *dev, Error **errp)
CPUCore *cc = CPU_CORE(dev);
int i;
qemu_unregister_reset(pnv_core_reset, pc);
for (i = 0; i < cc->nr_threads; i++) {
pnv_unrealize_vcpu(pc->threads[i]);
}