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target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled

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This is in preparation for restricting compilation of some parts of
debug_helper.c to TCG only.

Signed-off-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Fabiano Rosas 2023-02-17 17:11:27 -03:00 committed by Peter Maydell
parent 212154821e
commit fa05d1abb9
3 changed files with 21 additions and 8 deletions
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2
target/arm/cpu.c
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@ -539,8 +539,10 @@ static void arm_cpu_reset_hold(Object *obj)
} }
#endif #endif
if (tcg_enabled()) {
hw_breakpoint_update_all(cpu); hw_breakpoint_update_all(cpu);
hw_watchpoint_update_all(cpu); hw_watchpoint_update_all(cpu);
}
arm_rebuild_hflags(env); arm_rebuild_hflags(env);
} }

8
target/arm/debug_helper.c
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@ -939,7 +939,9 @@ static void dbgwvr_write(CPUARMState *env, const ARMCPRegInfo *ri,
value &= ~3ULL; value &= ~3ULL;
raw_write(env, ri, value); raw_write(env, ri, value);
if (tcg_enabled()) {
hw_watchpoint_update(cpu, i); hw_watchpoint_update(cpu, i);
}
} }
static void dbgwcr_write(CPUARMState *env, const ARMCPRegInfo *ri, static void dbgwcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
@ -949,7 +951,9 @@ static void dbgwcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
int i = ri->crm; int i = ri->crm;
raw_write(env, ri, value); raw_write(env, ri, value);
if (tcg_enabled()) {
hw_watchpoint_update(cpu, i); hw_watchpoint_update(cpu, i);
}
} }
void hw_breakpoint_update(ARMCPU *cpu, int n) void hw_breakpoint_update(ARMCPU *cpu, int n)
@ -1062,7 +1066,9 @@ static void dbgbvr_write(CPUARMState *env, const ARMCPRegInfo *ri,
int i = ri->crm; int i = ri->crm;
raw_write(env, ri, value); raw_write(env, ri, value);
if (tcg_enabled()) {
hw_breakpoint_update(cpu, i); hw_breakpoint_update(cpu, i);
}
} }
static void dbgbcr_write(CPUARMState *env, const ARMCPRegInfo *ri, static void dbgbcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
@ -1079,7 +1085,9 @@ static void dbgbcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
value = deposit64(value, 8, 1, extract64(value, 7, 1)); value = deposit64(value, 8, 1, extract64(value, 7, 1));
raw_write(env, ri, value); raw_write(env, ri, value);
if (tcg_enabled()) {
hw_breakpoint_update(cpu, i); hw_breakpoint_update(cpu, i);
}
} }
void define_debug_regs(ARMCPU *cpu) void define_debug_regs(ARMCPU *cpu)

3
target/arm/machine.c
View File

@ -2,6 +2,7 @@
#include "cpu.h" #include "cpu.h"
#include "qemu/error-report.h" #include "qemu/error-report.h"
#include "sysemu/kvm.h" #include "sysemu/kvm.h"
#include "sysemu/tcg.h"
#include "kvm_arm.h" #include "kvm_arm.h"
#include "internals.h" #include "internals.h"
#include "migration/cpu.h" #include "migration/cpu.h"
@ -848,8 +849,10 @@ static int cpu_post_load(void *opaque, int version_id)
return -1; return -1;
} }
if (tcg_enabled()) {
hw_breakpoint_update_all(cpu); hw_breakpoint_update_all(cpu);
hw_watchpoint_update_all(cpu); hw_watchpoint_update_all(cpu);
}
/* /*
* TCG gen_update_fp_context() relies on the invariant that * TCG gen_update_fp_context() relies on the invariant that