target/arm: Add a core count property
The cortex A53 TRM specifies that bits 24 and 25 of the L2CTLR register specify the number of cores in the processor, not the total number of cores in the system. To report this correctly on machines with multiple CPU clusters (ARM's big.LITTLE or Xilinx's ZynqMP) we need to allow the machine to overwrite this value. To do this let's add an optional property. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: ef01d95c0759e88f47f22d11b14c91512a658b4f.1520018138.git.alistair.francis@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -939,6 +939,11 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
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cs->num_ases = 1;
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cs->num_ases = 1;
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}
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}
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cpu_address_space_init(cs, ARMASIdx_NS, "cpu-memory", cs->memory);
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cpu_address_space_init(cs, ARMASIdx_NS, "cpu-memory", cs->memory);
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/* No core_count specified, default to smp_cpus. */
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if (cpu->core_count == -1) {
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cpu->core_count = smp_cpus;
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}
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#endif
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#endif
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qemu_init_vcpu(cs);
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qemu_init_vcpu(cs);
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@ -1765,6 +1770,7 @@ static Property arm_cpu_properties[] = {
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DEFINE_PROP_UINT64("mp-affinity", ARMCPU,
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DEFINE_PROP_UINT64("mp-affinity", ARMCPU,
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mp_affinity, ARM64_AFFINITY_INVALID),
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mp_affinity, ARM64_AFFINITY_INVALID),
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DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID),
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DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID),
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DEFINE_PROP_INT32("core-count", ARMCPU, core_count, -1),
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DEFINE_PROP_END_OF_LIST()
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DEFINE_PROP_END_OF_LIST()
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};
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};
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@ -745,6 +745,11 @@ struct ARMCPU {
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/* Uniprocessor system with MP extensions */
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/* Uniprocessor system with MP extensions */
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bool mp_is_up;
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bool mp_is_up;
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/* Specify the number of cores in this CPU cluster. Used for the L2CTLR
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* register.
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*/
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int32_t core_count;
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/* The instance init functions for implementation-specific subclasses
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/* The instance init functions for implementation-specific subclasses
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* set these fields to specify the implementation-dependent values of
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* set these fields to specify the implementation-dependent values of
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* various constant registers and reset values of non-constant
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* various constant registers and reset values of non-constant
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@ -42,8 +42,10 @@ static inline void unset_feature(CPUARMState *env, int feature)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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static uint64_t a57_a53_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri)
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static uint64_t a57_a53_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri)
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{
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{
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/* Number of processors is in [25:24]; otherwise we RAZ */
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ARMCPU *cpu = arm_env_get_cpu(env);
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return (smp_cpus - 1) << 24;
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/* Number of cores is in [25:24]; otherwise we RAZ */
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return (cpu->core_count - 1) << 24;
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}
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}
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#endif
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#endif
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