mips/kvm: Fix Big endian 32-bit register access
Fix access to 32-bit registers on big endian targets. The pointer passed to the kernel must be for the actual 32-bit value, not a temporary 64-bit value, otherwise on big endian systems the kernel will only interpret the upper half. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: kvm@vger.kernel.org Cc: qemu-stable@nongnu.org Message-Id: <1429871214-23514-2-git-send-email-james.hogan@imgtec.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -235,10 +235,9 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level)
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static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
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static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
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int32_t *addr)
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int32_t *addr)
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{
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{
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uint64_t val64 = *addr;
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struct kvm_one_reg cp0reg = {
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struct kvm_one_reg cp0reg = {
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.id = reg_id,
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.id = reg_id,
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.addr = (uintptr_t)&val64
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.addr = (uintptr_t)addr
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};
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};
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return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
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return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
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@ -270,18 +269,12 @@ static inline int kvm_mips_put_one_reg64(CPUState *cs, uint64_t reg_id,
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static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id,
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static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id,
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int32_t *addr)
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int32_t *addr)
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{
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{
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int ret;
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uint64_t val64 = 0;
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struct kvm_one_reg cp0reg = {
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struct kvm_one_reg cp0reg = {
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.id = reg_id,
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.id = reg_id,
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.addr = (uintptr_t)&val64
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.addr = (uintptr_t)addr
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};
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};
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ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
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return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
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if (ret >= 0) {
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*addr = val64;
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}
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return ret;
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}
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}
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static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64 reg_id,
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static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64 reg_id,
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