mips/kvm: Fix Big endian 32-bit register access

Fix access to 32-bit registers on big endian targets. The pointer passed
to the kernel must be for the actual 32-bit value, not a temporary
64-bit value, otherwise on big endian systems the kernel will only
interpret the upper half.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: kvm@vger.kernel.org
Cc: qemu-stable@nongnu.org
Message-Id: <1429871214-23514-2-git-send-email-james.hogan@imgtec.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
James Hogan 2015-04-24 11:26:52 +01:00 committed by Paolo Bonzini
parent 2d5ee9e7a7
commit f8b3e48b2d

View File

@ -235,10 +235,9 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level)
static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id, static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
int32_t *addr) int32_t *addr)
{ {
uint64_t val64 = *addr;
struct kvm_one_reg cp0reg = { struct kvm_one_reg cp0reg = {
.id = reg_id, .id = reg_id,
.addr = (uintptr_t)&val64 .addr = (uintptr_t)addr
}; };
return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg); return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
@ -270,18 +269,12 @@ static inline int kvm_mips_put_one_reg64(CPUState *cs, uint64_t reg_id,
static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id, static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id,
int32_t *addr) int32_t *addr)
{ {
int ret;
uint64_t val64 = 0;
struct kvm_one_reg cp0reg = { struct kvm_one_reg cp0reg = {
.id = reg_id, .id = reg_id,
.addr = (uintptr_t)&val64 .addr = (uintptr_t)addr
}; };
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg); return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
if (ret >= 0) {
*addr = val64;
}
return ret;
} }
static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64 reg_id, static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64 reg_id,